Forum Post: RE: ADC14DC080 EVM
Mr. Asaka,The ADC14DC080 is a different speed grade of the ADC14DC105 and due to such close similarity of the products, an EVM is no longer available for the ADC14DC080, only the ADC14DC105. The EVM...
View ArticleForum Post: Looking for proper evaluation board for AD convert and record?
Hello,I am looking for a programmable evaluation board which has ADC with sample rate higher than 2M samples per second. it is better that the board has media card slot so that the sampled data can...
View ArticleForum Post: RE: TSW1400
Hello TI,Can someone share instructions on changing the sampling rate to 245.76 Msps please ?My 307.2 msps DAC/ADC is functional.thanksVenky
View ArticleForum Post: RE: DAC8581 outputs 0V no matter what
Abel,Could you try a test using a smaller reference voltage or increasing the supplies to +/-5.5V? Try this with a new unit. I'm worried that the reference is higher than the supply voltages and...
View ArticleForum Post: RE: ADC128s102 - split of total supply current (Ia=? Id=?)?
Wow, thanks for the quick response Tom! Yes, average I_digital & I_analog. I will use the total current at shutdown for a y-intercept of a current formula: I_total = I_shutdown_total + (F_oper /...
View ArticleForum Post: AIC34_PLL_Q
Hi:In Figure 25 on page 31 of the AIC34 datasheet (SLAS538A), is the Q divider part of the PLL?The reason for the question is that for codec B we don't need the PLL; however, do need the Q divider....
View ArticleForum Post: RE: Explain about ads1232 internal and external clock
Hi Siva,The ADS1232 pin called SPEED (pin21) sets the data rate to 10sps (when set low) or 80sps (when set high). These data rates are assuming a clock frequency of 4.096MHz, which is the internal...
View ArticleForum Post: RE: TVP5146 Noise Problem
HI Steve,Please find below the register values:tvp514x 1-005d: tvp5146 (Version - 0x03) found at 0xba (DaVinci I2C adapter) tvp514x 1-005d: Reg(0x00): 0x05 tvp514x 1-005d: Reg(0x01): 0x0F tvp514x...
View ArticleForum Post: RE: SPI Clock Baudrate for ADS1148
Hi Raja,The minimum period is actually the maximum frequency. 2MHz is the fastest SCLK that can be used with the device. The SPI will timeout after 64 conversions cycles, so the next clock must...
View ArticleForum Post: RE: ads1232 external clock question
Siva,See my answer here:http://e2e.ti.com/support/data_converters/precision_data_converters/f/73/p/288333/1006457.aspx#1006457Best regards,Bob B
View ArticleForum Post: RE: ADS1243 Initial gain error
Hi Steffan,The best approach is to issue the SELFGCAL initially using a gain of 1, then change the PGA to gain of 64 and issue the SELFOCAL. Following the self calibration, you should then expect to...
View ArticleForum Post: RE: ADS1241 sampling an input signal range over 5 volts
Hi John,You should be able to get ADS1220 devices from sample stock by clicking on samples on the device landing page.As far as the ADS1241, use 2.5V for reference (also can be used to connect to AIN-...
View ArticleForum Post: RE: TLV320AIC3256EVM-U Sample Rate/Firmware Issues
Sorry but this does not work. Here are the steps and what happened...I did finally get it working though and have included the steps below that I used. Someone else may be able to use them if they run...
View ArticleForum Post: ADS5407 Vcm output drive strength
Hello-We are using the ADL5566 to drive the two inputs to the ADS5407, but the resulting common mode is 2.3V rather than 1.9V. How much current can the Vcm output pins of the ADS5407 provide? Thanks...
View ArticleForum Post: RE: ADS5560EVM Schematic not accurate in datasheet
Hi! I have Rev C and the manual found here: http://www.ti.com/litv/pdf/slau260 is not consistent with the module. Can you please update the manual?
View ArticleForum Post: RE: ADS42xx/58C28EVM spi communication from fpga does not seem to...
MIN of High-level input voltage for SPI lines is 1.3V and MAX of Low-level input voltage is 0.4V. So, 1.8V of CMOS should be fine with up to 20MHz of SCLK. tSLOADH (SCLK to SEN hold time)is MIN 25ns...
View ArticleForum Post: RE: DAC2904 output issue
Hi,I did a quick scan of the datasheets and it appears that this should work fine. In fact, figure 18 of the datasheet indicates that the mode pin has a 100 kOhm internal pullup resistor. So it looks...
View ArticleForum Post: RE: ADS5407 output data clock sharing
Hi,Our EVM for this device only uses one of the two clocks into the FPGA of the TSW1400, so using one of the two clocks is not an issue. Either clock is fine. The two outputs are copies of the same...
View ArticleForum Post: RE: TSW1400
Hi Venky,thanks for the reminder and apologies for the delay.You are asking for the 245.76MSPS data rate, and with 4x interpolation, the final DAC update rate is 983.04MSPS.The TSW3085 has the on-board...
View ArticleForum Post: ADS131E04 Anti-aliasing Filter Question
I'm using the ADS131E04 to digitize the outputs of a triaxial accelerometer array. The ADC is set up as follows:1. f_CLK is 2.048 MHz. 2. f_DR is 2 KHz. This gives an f_DR / f_MOD ratio of 0.002....
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