Forum Post: RE: ADS1278EVM-PDK DRDY
Yes,I connect AVDD, DVDD and IOVDD voltages to to ADS1278EVM-PDK board.
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Forum Post: ADS7954 / Manual Channel Sequencing Mode
Hello, Please let me know about ADS7954 Manual Channel Sequencing Mode.Our customer sequence is as below.Is this sequence correct ?If no, please let me know this possible cause ? I see the datasheet...
View ArticleForum Post: RE: what‘s the PCM1794a output frequency during different...
the issue,if my input source is 192K, do the device also convert by 8x over sampling?or use other oversampling ? i can't understand it clearly, will u give a example? thans u so much
View ArticleForum Post: RE: DAC5681Z - CLKIN status during SIF registers programing
Hi Matt,Thanks you for your reply, we have made a powering up procedure for our design.On the same subject concerning the CLKIN : - Do we have an obligation to respect a synchronization (rising and...
View ArticleForum Post: RE: Problem in SPI communication with ADS1148 EVM
Hello Bob,Hello Mr.BOB, I am sending as attachment i.e. (Please visit the site to view this file)my schematic of ADS1148 for 32 channel universal input DAS. Following are the details of the circuit...
View ArticleForum Post: RE: why ADC fails working?
please refer to the ADC driver guide on wiki. Notice this message:" Since our driver is not trigger based we need to modify this application to bypass the trigger detection. Please apply patch...
View ArticleForum Post: RE: ADS1216 irratic output (or very noisy results)
Hi Hans Peter,Thanks for the update. Your original data showed about 9 bits of noise peak to peak and you should see something closer to 6 bits. A lot of times this can be an issue with board layout....
View ArticleForum Post: RE: The TPS7347 G output with 0X84/0X85 shift issue
I suggest you re-post this to the buffers forums.Sorry I can't help more.BR,Steve
View ArticleForum Post: RE: ADS1298 Base drift issue
Hi Pandian, Can you confirm that the patient is being properly biased by RLD? This is needed to keep the input within the common-mode range of the device.Also, try reducing the low-pass filter to 0.05...
View ArticleForum Post: RE: ADS 1298 PC Software
Hi Carlos,You should receive an email shortly. Thanks!Regards,
View ArticleForum Post: RE: AMC7812EVM-PDK Windows driver
Hello Vedran,You can download the software for the AMC7812EVM at the following website:http://www.ti.com/tool/AMC7812EVM-PDKThe software is listed under the the "Free Evaluation Tool...
View ArticleForum Post: RE: TLV320AIC3254EVM-U Firmware and HID
Hi d2I also started with the Evaluation Stick with the TLV320AIC3254 and the TAS1020B Streaming Controller. Now I am looking for an other Streaming Controller, because the TAS1020B is NRND. Is there a...
View ArticleForum Post: RE: DAC5681Z - CLKIN status during SIF registers programing
Hi Benjamin,You do not need to guarantee timing between CLKIN and DCLK because an internal FIFO will absorb any skew. However, they both need to come from the same time base.I would expect this to be...
View ArticleForum Post: RE: overclocking ADC12D1800RF
Hi Jim,the application is in radioastronomy. Even small imbalance between even and odd samples shows up in the correlation process as hard to remove image artifacts.Any chance TI will have faster...
View ArticleForum Post: RE: TSW1400EVM Verilog code
Bumping this post up, can someone send me the Verilog code so we can modify it?Thanks,Daaf
View ArticleForum Post: RE: PCM2707 mono Signal
You can set the alternative endpoint settings with int usb_set_interface (struct usb_device * dev, int interface, int alternate); assuming you use Linux. Windows may have a different API but the...
View ArticleForum Post: RE: what‘s the PCM1794a output frequency during different...
The 8x oversampling digital filter will also work for a 192kHz sampling rate. There is nothing that needs to be configured, just choose a compatible SCK (see table 1), apply your 192kHz word clock,...
View ArticleForum Post: RE: ADS8528: Issue Writing to the Configuration Register
Hello Tom,Previously, I didn't check the DDR1 and DDR2 registers since I assumed (:( never assume) they would have the same values as shown on the logic analyzer.After five 32-bit reads, the Mcbsp DRR1...
View ArticleForum Post: RE: Problem with LMP90100 in single scan mode.
Hi Mike,You're spot on. The corrupted conversion happen to be too high causing the OFLO_FLAGS to be set. Since I was RESTARTing every conversion I constantly got this error.I increased the ODR to 53...
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