Hi Brent! Welcome to our e2e forum! Can you provide a schematic and any timing screen shots (o'scope preferred, logic analyzer is OK) showing the control signals? That would be very helpful getting started with your issue. Any detail you can provide on your register settings would also be helpful.
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Forum Post: RE: ADS8681: RVS not going high after reset
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Forum Post: RE: ADS1282: Noise Floor is too large
Hello Iouri, Since you are using the SINC filter, the 24b code is divided by 2. With PGA=1: = 0.5 * 5V / (2^22 - 1) * ; for a 24b signed integer is the decimal equivalent (signed integer) of the two's complement code. Regards, Keith
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Forum Post: RE: TSW14J58EVM: Recommended FPGA Sample Design for ADC32RF55EVM
Thank you so much! I was able to check the parameter value. It was very helpful! On the other hand, the phenomenon of the current value not stabilizing occurs irregularly. Is this impossible to improve?
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Forum Post: RE: ADS7042: transfer error
AI电源 采样电阻（ Ω ） 输入电流 T47（测试值） T46（测试值） 1 3.305 137.12 0 4 0.546 0.547 7 0.957 0.958 10 1.367 1.368 15 2.051 2.052 20 2.736 2.737 2 3.302 136.72 4 0.545 0.545 7 0.954 0.956 10 1.364 1.365 15 2.046 2.047 20 2.729 2.73 3 3.304 136.72 4 0.545 0.545 7 0.954 0.955 10 1.364 1.364 15 2.045 2.045 20 2.727 2.726 您好，乔尔。 编号1的误差范围相对小一些，编号2、3就较大一些。采样电阻上是有差异性，把编号1的采样电阻放到编号2和3的板子上，误差有所改善，但还是在0.5%以上。编号2更换一个AD转换器，误差就会好很多，把2号的AD转换器换到1号板子上，误差就又差很多。
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Forum Post: ADC14L020: Thermal information : ADC14L020CIVY/NOPB
Part Number: ADC14L020 Tool/software: Hi, On the datasheet of ADC14L020CIVY/NOPB, we can not find the thermal information, such as Theta-JA,JC etc. Could you please provide us? Thanks and best regards, M.HATTORI.
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Forum Post: RE: ADS1298ECGFE-PDK: ADS1298ECGFE-PDK GUI
Hi Ryan, The register settings are programmed defaults in the GUI. Please find the below, conf|config1 0x01 0x86 conf|config2 0x02 0x10 conf|config3 0x03 0xDC conf|loff 0x04 0x03 conf|ch1set 0x05 0x01 conf|ch2set 0x06 0x01 conf|ch3set 0x07 0x01 conf|ch4set 0x08 0x01 conf|ch5set 0x09 0x01 conf|ch6set 0x0A 0x01 conf|ch7set 0x0B 0x01 conf|ch8set 0x0C 0x01 conf|rldsensp 0x0D 0x00 conf|rldsensn 0x0E 0x00 conf|loffsensp 0x0F 0xFF conf|loffsensn 0x10 0x02 conf|loffflip 0x11 0x00 conf|gpio 0x14 0x00 conf|pace 0x15 0x00 conf|resp 0x16 0xF0 conf|config4 0x17 0x22 conf|wct1 0x18 0x0A conf|wct2 0x19 0xE3 Also, we have tried two different ECG waveform sources, yet no response. Also, will try to connect 100 mVp sine wave as suggested and get back to you. Do we need to change any register settings?
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Forum Post: ADS124S08: IEC 61000-4-6 Conducted immunity test failed in 4 wire PT100 port and IC gets damaged
Part Number: ADS124S08 Tool/software: We have designed 4 analog inputs +/-10V and 2 port for four wire PT100. We have placed as per TI guidelines TVS protection diodes in each ports and also place MOVs to earth on each lines, still we are facing issue that IC gets damaged in conducted immunity test while testing 4 wires PT100 port. Is there any way to protect and passed CI test in class A? Thank you. Neel Shah
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Forum Post: RE: ADS1298: Simulation of ADS1298
Hello Ryan, Firstly, I would Thank you for giving me the unknown insights about ADS1298 and OPA350 both have similar input impedance and bandwidth characteristics. Our main intention was to find out the right value of passive components like capacitors and resistor that we place at the VDDA pins, so that the ADS1298 powers up with no issues and works. If you can help us in providing the internal block diagram components of ADS1298, we can try to build an approximation of ADS1298, and try simulating it.
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Forum Post: ADS7924:リファレンスが「Supply」 の場合、AVDDは一定でなくてもADIのスケールは維持されるか。
Part Number: ADS7924 Tool/software: ADS7924 はリファレンスが「Supply」 になっています。デバイスは AVDD を加えた電圧から内部でリファレンス電圧を生成していすか。推奨動作電圧の範囲内の AVDD であれば何ボルトを加えても ADI のスケールは一定に維持されます。 具体的な例として、ADIのCH1に2.2Vを与えていれば、AVDDが5.5Vから2.2Vの範囲で変動しても、変換され出力されるデジタル値は同一ですか。例えばバッテリー駆動のケースです。
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Forum Post: RE: DAC39RFS12: JESD204B/C Protocol for high-speed DAC and ADC converters
Hey Masa, What center frequency range are you targeting? Typically I recommend DES2XL for 1st Nyquist and DES2XH for 2nd Nyquist. With the 0.4*FS bandwidth of the DES2X interpolator You'll be able to generate tones with signal content up to 2.88GHz in 1st Nyquist (DES2XL) and after 4.32Ghz in 2nd Nyquist. In RF mode you may be able to operate in this transition band near the Nyquist boundaries; however you will have the unwanted Nyquist image to content with. Regards, Matt
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Forum Post: RE: ADS7042: transfer error
Hi Yong, To properly determine the margin of error, you'll have to use something more precise to measure the voltage, like a 6 1/2 digit digital multimeter. You will have to probe AVDD and T46. Along with that, I'll also need the binary output code you are getting from the ADC to see if it matches with what it is seeing at its input terminals. Currently, I can't tell if the conversion which the ADC is outputting is within the specified margin of error. It is okay to try this with only one board for now. Best, Joel
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Forum Post: RE: BP-DAC11001EVM: Software cannot connect to DAC
Hi Katlynne, When can I expect a response from him? Thanks, Adarsh Singh
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Forum Post: RE: ADS8681: RVS not going high after reset
With a 10k pull-up to 3.3V on RVS, its voltage goes to 3.3V when RST_n is 0V. That would lead me to believe that RVS is open-drain. Is that expected?
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Forum Post: RE: ADS124S08: IEC 61000-4-6 Conducted immunity test failed in 4 wire PT100 port and IC gets damaged
Hi Neel Shah, I know that we have communicated on E2E in the past, but I don't recall seeing the schematic or layout. Passing the IEC tests can be a challenge. Resolving this could require schematic or PCB layout changes. One of my colleagues has designed boards specific to thermocouple and RTD inputs and testing the boards through a variety of the IEC tests using the ADS124S08. We had hoped to post those findings earlier this year but due to shifting priorities this has been delayed. Earlier my colleague posted this application note that may be helpful. Many of the same concepts would apply to pass the IEC tests. To be of further help I would need to see the schematics and board layout. Best regards, Bob B
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Forum Post: RE: ADS1298: Simulation of ADS1298
Hello Varun, The only block diagram details I can provide are included in the device data sheet (section 9.2). For power supply sequencing and recommended decoupling, please refer to Sections 10.1.1 and 11. The EVM User Guide also has examples of decoupling capacitor values and layout. Regards, Ryan
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Forum Post: RE: ADS1299: Inquiry about setting of [LOFF STAT]
Hello Henry, If the inputs to Channel 1 are floating, the output of the PGA is undetermined. It may be that the two inputs are floating close to the same potential with some small offer, so Gain = 1 results in a mid-scale positive code with some fluctuation due to noise. When the gain is increased to 24 V/V, the differential output exceeds full-scale, so the device outputs the maximum output code. The DC lead-off detection comparators are located at the inputs to the PGA. Therefore, the gain setting of the PGA should not affect this. If there is a change in leakage current, I imagine it is negligible. Regards, Ryan
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Forum Post: RE: ADS1282: Noise Floor is too large
Hi Keith, I have updated calculation formula and results doesnt look right. I have applied 250mV differential sine wave 250HZ V offset = 2.5V DC to AIN0 channel, I am getting relatively large DC bias from 0, as well amplitude doesnt seem right. Please see bellow schematic of the input stage: Please review and advise if something doesnt look right. Thank you for your support. Regards, Iouri
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Forum Post: RE: DAC80502: How to calculate TUE?
Hi Takumi-san, I'm still not able to get the exact 0.112% value, but I think the issue is that this section of the datasheet was written while the device was still in preview, and it looks like they updated some specs for the final released version of this part without going back to revise the example in this section. For example the paragraph at the beginning of section 9.2.2 says the TUE is 0.02% FSR typical, but the electrical characteristic table shows 0.04%FSR typical. When I use the 0.02% value I get 0.114%FSR which is closer to the value calculated in the example. Your calculation is correct assuming a 2.5V full scale range. My only comment would be to use the typical value for TUE. The typical value is given at 25°C, and the min/max value is given across the entire temperature range this device is characterized for (–40°C to +125°C). So in this example, since we are only concerned with the 0 to 100C range, you should use the typical spec and then the drift specs will add only the drift for the 0°C to 100°C range. The full-scale error and zero-scale errors are end point errors due to the internal output buffer not being able to output values at the power rails. Best, Katlynne Jones
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Forum Post: ADS7953-Q1: reference driver codes for ADS7953QDBTR1
Part Number: ADS7953-Q1 Tool/software: Hi, I am using device ADS7953QDBTR1 with RM57Lxx MCU. Do you have example(or reference) source code for this device driver? Thanks, James
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Forum Post: RE: ADS1298ECGFE-PDK: ADS1298ECGFE-PDK GUI
Hello Nivethitha, Please change the CHnSET bits [2:0] to 000b. Currently, you have configured all channels for internal input-short configuration. This means the inputs to the PGA are disconnected from the device pins and shorted internally to a mid-supply common-mode voltage. Differentially, all channels will measure close to 0V in this setting. Regards, Ryan
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