Part Number: ADC12DJ5200RF I have two questions about ADC12DJ5200RF Datasheet Datasheet URL: https://www.ti.com/lit/ds/symlink/adc12dj5200rf.pdf?ts=1716424043191&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FADC12DJ5200RF Q1. The ADC side transmits data from the JESD204 PHY using 2LINKs of 4Lane+4Lane, but at this time, do each LINK transmit data in synchronization? Q2. One LINK can output 8 lanes, but when JMODE = 0, only 4 lanes out of 8 lanes are used, 2LINK output of 4Lane/8Lane + 4Lane/8Lane. At this time, is it okay to open the unused 4Lane+4Lane?
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Forum Post: ADC12DJ5200RF: JESD204 LINK from ADC12DJ5200RF Datasheet
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Forum Post: ADC12DJ5200RF: Device clock calculation
Part Number: ADC12DJ5200RF Is the device clock A)4GHz under the following conditions? Or is it B)2GHz? For example, I want to transmit 12 bits of data per symbol at 4GSps. The sampling frequency is 4GHz. A) At this time, 4 tail bits are added to 5 symbols (60 bits) in the transport layer, Considering 8b/10b conversion, 48Gbps * 64/60 * 1.25 = 64Gbps When transmitting with 8 lanes, the data rate is 8 Gbps per lane (lane_rate) When JMODE = 0, it operates in single channel mode and the sampling rate is twice the device clock, so I calculated that the device clock would be 4GHz. But, I can think differently. B) glbl_clk = lane_rate / 40 = 200MHz device clock = sample_rate / 2 = 2GHz
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Forum Post: RE: DAC82001: Output noise (0.1 - 10Hz) graph
Hello Lucas-san, Thanks for your support. I will wait for your feedback. Best regards,
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Forum Post: RE: ADS7830: Internal Voltage Reference Drop after I2C detect command
Hi Matt, So, you have to write the address and command byte. If all you do is write the address byte, the ADS7830 will assume your command was 0x00 and shut off the reference. In your multi-address sequence, you need to include the command byte in order for the reference to remain on.
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Forum Post: RE: ADS131M02-Q1: Root cause of the offset issue
Hi Yoshikazu-san, I will look into the details and get it back to soon. Thanks®ards, Dale
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Forum Post: TX7316: TR_EN Pin
Part Number: TX7316 Tool/software: Hello E2E Experts, Good day. I have a question about the TX7316 TR_EN pin. If I use on-chip beamforming, doesn't the level of the TR_EN* pin matter? Is it just the register bits that control its turn-on and turn-off times? Regards, TI-CSC
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Forum Post: RE: ADS131M02-Q1: Root cause of the offset issue
Hi Yoshikazu-san, are the results mentioned in the Excel sheet with global-chop mode enabled or disabled? With global-chop mode disabled the ~200uV offset for the current shunt measurement would be within the expected specification. For the voltage measurement, the 0.75mV offset look to large. What data rate (or OSR) are they using? Could they provide the raw conversion results from the ADC for the measurements with 0A current and 0V voltage? Could you ask the customer to measure the offset with the inputs internally shorted by setting MUX0[1:0] = 01b and MUX1[1:0] = 01b? And do the measurement both with global-chop mode enabled and disabled. That way we can potentially identify if the offset is coming from the device itself or rather the external circuitry. Note that ADC1 offers better offset performance than ADC0. Therefore it would be preferable to use ADC1 for the current shunt measurement. I wanted to mention that we also offer ADS131B02-Q1. This device has improved offset performance compared to ADS131M02-Q1 and also integrates an oscillator so that an external clock would not be required. The ADS131M02-Q1 and ADS131B02-Q1 are pin-to-pin compatible. Regards, Joachim Wuerker
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Forum Post: RE: ADS1298: isolation protection circuit
Hi Ryan, I am not looking at isolate digital interface. As per IEC-60601-1 standard, need to provide isolation protection circuit for patient safety. Here, we have isolation from power supply and signal isolation between patient electrodes and ADS1298 AFE. So, i need a help to select those parts and connections to ADS1298.
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Forum Post: RE: TX7316: TR_EN Pin
Hi, In case of on-chip beamforming, the T/R switch turn on/off is controlled only by the internal digital based on the values programmed in the corresponding registers. The TR_EN* pins in on-chip beamforming are used in the dynamic mode to optimize the power consumption in the device (refer to the section Dynamic Power Mode in the datasheet). Thanks and Regards Savyan
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Forum Post: RE: DAC43401-Q1: Want to know the right register for my situation
I tested 2 days ago changing SLEW_RATE from 0000 to 1111 and there's no change. test environment is repeating below chunk, changing 0xD1 value 0xC004 ~ 0xC1E4 yi2cset -f 9 0x48 0xD3 0x5208 w yi2cset -f 9 0x48 0x25 0x0170 w yi2cset -f 9 0x48 0x26 0x0000 w yi2cset -f 9 0x48 0xD1 0xC124 w -> 0xC004 ~ 0xC1E4 yi2cset -f 9 0x48 0xD3 0x0108 w But, there's no changes Thanks.
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Forum Post: AFE5808: Design support for AFE5808
Part Number: AFE5808 Tool/software: Hello TI team, I'm going to use this AFE5808 IC for my design but i need your help to design the circuit with this, So im using this with ABLIC 7502 chip so can i get design support from your side to design my AFE5808 with ablic chip and also im using Cyclone 10LP FPGA chip in this. Thank you, Harsh Shirke,
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Forum Post: RE: ADS8326: ADS8326IDGKT
The first picture is the communication with the MCP: The second picture is the communication with the ADS: Number one: MISO line Number two: CLK line Number three: MOSI line The cs line is not present on the scope shots.
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Forum Post: RE: ADS8686S: Bandwidth using Oversampling
Hi Cornelius Fink , I will get it back to you tomorrow, thanks. BR, Dale
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Forum Post: DAC7311EVM: Where to download the drivers of MMB0 for windows 10 or above ?
Part Number: DAC7311EVM Other Parts Discussed in Thread: DAC7311 , DXP Tool/software: Where to download the drivers of MMB0 for windows 10 or above ? I used the MMB0 board with DAC7311 EVM,the evm had pluged into MMB0,and the DC input for the MMB0 is +5V, the MMB0 connected my PC with the USB cable , but windows can't recognized MMB0 ,MMB0's name in the PC is "unknown device", see the picture below : I had installed the Labview 2024 , but when I run the DXP software from Ti ,there was a notication like the picture below :
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Forum Post: ADS8684: Interchannel interference
Part Number: ADS8684 hi team, my customer is afraid of the interchannel interference. Do we have some special ways to avoid this? thanks!
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Forum Post: RE: DAC39RFS12: JESD204B/C Protocol for high-speed DAC and ADC converters
Hi matt I am also considering purchasing a DAC39RF10 and am wondering which JESD mode would be best. I would like link too if possible. I am not sure about the "streams" item in Table 7-21. Is it like sending one chunk of data several times? I would like to know specifically. When outputting 1ch of real waves with JMODE 1, is Lane 8~15 (CH0_Q[7:0]) not used? (Cannot be set in the first place?) regards, masa
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Forum Post: RE: ADS8684: Interchannel interference
Hi Zoey, Please review page 9 of the datasheet for crosstalk isolation and memory. Channel to channel isolation is 110dB typical.
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Forum Post: ADS1298: Simulation of ADS1298
Part Number: ADS1298 Other Parts Discussed in Thread: OPA350 , TINA-TI Tool/software: We are working on an ECG project using ADS1298 from Texas Instruments as our analog front end module. So before getting the design done practically, we thought of testing the connections and also about passive resistors and capacitors values by simulating it in a virtual environment, In TINA-Texas simulation tool we didn't found ADS1298 for simulation. i request your help in finding some appropriate library to load ADS1298 spice model into TINA for simulation purpose or some other simulation tools that has ADS1298 spice model in it.
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Forum Post: RE: ADS131M04: N-pin voltage refers to communication issues
Hello: 2. We have conducted a series of checks and comparative tests, and we suspect that the jumping of those registers may be caused by over range. We will further verify this.—— We have tried, but even after setting the reference voltage to 0V, some register readings still change。 Thank you!
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Forum Post: RE: ADS131M02-Q1: Root cause of the offset issue
Hi Yoshikazu-san, it might also be good to verify that global-chop mode is really enabled. You could verify that by monitoring the DRDYn pin. The pin should transition low with a data rate which is ~1/3 of the data rate when global-chop mode is disabled. The ADS131B02-Q1 is actually the newer device. We released the non-automotive version of ADS131M02 first to the market. We then developed ADS131B02-Q1 for the automotive BMS market as an evolution of the ADS131M02. We increase the input impedance by adding input buffers, improved the offset performance, and added an internal oscillator besides other things. Later on we then also qualified the ADS131M02 for automotive due to customer requests. Regards, Joachim Wuerker
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