Thanks Bob, My main concern was making sure the switched capacitor stage the datasheet takes about still gained signals differentially, I'll take your response to mean that it does. Regards, Jake
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Forum Post: RE: ADS1120: Input Range With PGA Bypassed
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Forum Post: RE: ADS7263: SEE Data
Some additional information. These are being used on a military aerospace application and we need either actual SEE data or perhaps similar technology devices that do have SEE data. Or perhaps someone who has used these parts in an aerospace application that can indicate if any Single Event Effects or Single Event Latch Ups have occurred and number of hours they have been in operation.
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Forum Post: RE: ADS1248: ADS1248 single ended measurement
Friedrich, Generally, EMI is a system level problem and dependent on many factors associated with physical layout of the board and system. I don't know have any recommendations on specific input filters. You may be able to remove the effect with some aggressive RC filtering, but it would require some experimentation. Increasing the capacitance will give a lower impedance path to dissipate differential EMI signals, or shunt common-mode EMI signals to ground at high frequency Normally, you need to consider the EMI while doing the layout of the board. Start by reducing long lead wires in the signal path. This would include connections in your testing system if they are going to some controller. If you are measuring RTDs, then you might have a long lead attached to the input of the system that may need to be shortened. Also, reduce any large electrical loops in that might be created in your circuit. This certainly includes the input and reference signal paths, but may include the power and digital lines as well. Shielding certainly helps with EMI. In layout, using the power and ground planes over sensitive signal paths will certainly reduce the effect of EMI. On top of the board, it may be worthwhile running tests with partial shielding to see where the EMI causes the most problem. Out of curiosity, how does the EMI cause a problem? However were the measurements corrupted? Does the device have a shift in gain error or offset? Is there a reset of the device? When EMI is removed, does the system return to normal? Joseph Wu
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Forum Post: RE: ADS1120: Input Range With PGA Bypassed
Hi Jake, With the PGA_BYPASSED the ADS1120 will work the same was as with PGA enabled with the advantage of a relaxed input common-mode. You can have a maximum gain of 4 with PGA_BYPASSED. The downside of the PGA_BYPASSED is lower input impedance. Otherwise the measurement will work the same way. So to specifically answer the original question, yes you can measure +/-400mV at 1.5V common-mode and gain of 4 using the internal reference. Best regards, Bob B
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Forum Post: RE: ADS54J60EVM: Inconsistent setup behaviour
Richard, When dividing by 1 with the DCLK in the LMK tab, you must set the DCLK Divider to "Divider+DCC+HS". Other wise the output is unstable. In our example when using a very similar setup (see attached), we provide a core clock that is the ADC sample rate/4 (250MHz in your case) to the KCU105. You may want to try this as well. Regards, Jim (Please visit the site to view this file)
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Forum Post: RE: RE: ADS1120 Configuration registers
Hi David, The numbers on the top of the package give information as to when the devices were packaged along with a code regarding assembly/test site and lot trace information. The first 2 numbers give the year and month of manufacture. The 71 indicate 2017, and first month (January). The 44 would be April, 2014. Regarding the device code in question, we have not had any reports of issues. It is possible that your design in marginal. If you would send me your schematic I can attempt to evaluate why you might be seeing some issues or possible areas of concern. Also, if you could send me the configuration setting you are using that would also be helpful. Best regards, Bob B
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Forum Post: RE: TLV320DAC3120: MINIDSP LOWPASS FILTER CONFIGURATION
Hi Ivan, Thank You very much for your response it was very useful to make the formula to use with the chosen Fc. Do you know which registers I need to configure (Address) for a 2nd order Butterworth low pass filter? Best regards, Amine.
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Forum Post: RE: ADS1220 signal is alwys high on Data Ready Pin (DRDY)
Hi Sandeep, Your last set of calculations is using data rate of 1000sps, but you are showing 20ps. It would appear that your target would be met for the 150kg load cell. For question 1, the accuracy of 0.1% of 50N is 0.005N and you desire a resolution of 0.01N. To determine this you really need to know the full-scale range or sensitivity of the sensor used. If this is a bridge type sensor, then the sensitivity of the sensor output is key to getting higher resolution. To meet the 1ksps minimum you could possibly use the ADS1220 , but you may need to use a lower noise ADC such as the ADS124S06 or the ADS1262 . Regarding question 2, you kind of answered this yourself in the earlier calculations. Due to conversion noise alone (not accounting for any external noise) you at best have a 0.025g resolution. The spread of the numbers given were from 199.90 to 199.76 which is 0.014g difference or within 1 noise-free count. You also need to account for air currents (both across the load cell and ADC drift), vibrations and external noise from EMI/RFI as this will also affect your reading. For 3, you want the measurement to be ratiometric where the reference source is the same as the excitation source. Any noise or drift in the excitation/reference will cancel in the measurement if it is ratiometric. If different sources are used, then reference and excitation noise/drift will affect the outcome. Best regards, Bob B
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Forum Post: RE: TLV320AIC3100: No sound from Class-D Speaker
Hi, Adrian, Welcome to E2E, Thanks for your interest in our products!. My colleague will help you in this issue, Is there a way for you to provide the register configuration of the device?. If there is no output at all in the speaker outputs, then the problem could be a bad configuration of the output speaker driver or a short circuit condition. Best Regards, -Diego Meléndez López Audio Applications Engineer
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Forum Post: RE: tlv320aic3100: tlv320aic3100 headset detection
Hi, Akinet, I have asked my colleague to take a look to your questions. Can you please read the value of bits D6-D5 of register 67? Is the headset identified?. The headset detection feature should work after the analog general configuration is done. Can you please provide your register setup?. Best Regards, -Diego Meléndez López Audio Applications Engineer
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Forum Post: RE: ADS1298RECGFE-PDK: issues on reading respiration from a real patient
Hi Manuel, I understand your question. Our EVM was never intended to be connected to a real patient, nor has it ever been tested by TI in this manner. I have to emphasize that we cannot guarantee the safety of the patient or the quality of the results under these conditions. My only advice would be to use gel electrodes to lower the contact impedance as much as possible, which I believe you are doing already. Body hair and different skin types can have a big impact on this as well, so the results will still vary. Of course, the patient should also remain as still as possible throughout the measurement to minimize motion artifacts. I'm sorry that I cannot provide any further assistance on this. Best Regards,
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Forum Post: RE: TLV320DAC3120: MINIDSP LOWPASS FILTER CONFIGURATION
Amine, Coefficient value registers begins at Page 8 Register 0x02 through register 0x3D. As an example I'll use filter 1 to setup a 2nd order Butterworth LPF with Fc = 300Hz and Gain = 0dB. So I write the following in page 8: 0x00 into reg 0x02 0x0E into reg 0x03 0x00 into reg 0x04 0x0E into reg 0x05 0x00 into reg 0x06 0x0E into reg 0x07 0x7C into reg 0x08 0x20 into reg 0x09 0x87 into reg 0x0A 0x84 into reg 0x0B I obtained these coefficients using biquad coefficient calculator. I hope this helps Best regards, -Ivan Salazar Audio Applications Engineer - Low Power Audio & Actuators
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Forum Post: RE: ADC12J4000EVM: Is the JESD transmitter in ADC12J400 keep sending data continuously?
Hi Jim, Thank you very much. I tried the step 1 you suggested and the problem has been solved. The default configuration of JESD clocks need to be modified as described in section 6.3. Regards, Tong
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Forum Post: TLV320AIC3268: TLV320AIC3268 HW connect for unused function power
Part Number: TLV320AIC3268 Dear Sir, My application of TLV320AIC3268 is simple, 3 channel I2S in/out , 1 LINE out and 1 phone out to amplifier. The Speaker, REC,MIC are unused in my application. Because of unused function, how these power pin ( SVDD/MICBIAS/SPK_V/MICDET/VBAT) should be connected? Floating, GND, or others. (The below figure is my schematic for TLV320AIC3268 ) Thanks a lot~
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Forum Post: RE: ADS54J42: Cannot configure the digital pages (6800, 6900 or 6A00)
Bjorn, I am checking with the design team regarding your first question. The 8224 mode is the mode that requires the fewest amount of register writes after power up. You will have to do these writes to get an output. I do not have much experience with this test pattern either. I suggest you consult section 5.3.3.8.2 of the standard for more info regarding this. Regards, Jim
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Forum Post: RE: TLV320AIC3100: No sound from Class-D Speaker
Hi Diego, I attached register configuration here (dumped while trying playing), please kindly help to check. Thanks, Adrian (Please visit the site to view this file)
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Forum Post: RE: ADS1262: Is the noise performance of ads1262 effected by clock jitter a lot?
Hi Yang, I sent you my comments regarding the layout, you should see it in your inbox. I might also suggest a few other quick noise tests to help rule other other possible noise sources: First, try shorting the ADC inputs internally using the ADS1262 's MUX. You can accomplish this by connecting AINP and AINN to AINCOM and enabling VBIAS to set the common-mode voltage. Often times you may see a small difference in noise performance when comparing an internal vs external short. This might indicate that there is some noise coupling )or pick-up) on the input traces. Since you have several ADCs in your design, you might try testing the noise with just a single ADC enabled. With multiple ADCs sharing a single supply there may be a certain amount of common-impedance noise coupling between ADCs on the supply pins. With just a single ADC enabled (nPWDN pin set high), you might see a slight improvement in noise performance. You might check running the ADCs at one of the slower data rates the provides 50/60 Hz power line noise rejection (the 20 SPS FIR filter will reject both 50 and 60 Hz) and comparing the noise performance to the datasheet again... You might just have some added power line cycle noise in your circuit that you can filter out by running at a slower data rate. Overall, 3 uVrms compared to a typical specification of 1.7 uVrms is not bad. Even with an optimum layout, there isn't much room left for improvement. I hope that helps! Best regards, Chris
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Forum Post: RE: ADS1282: ADS1283
Hi Leif, The internal MUX short is generally just used as a test case. Depending on what you're comparing the offset to, I would expect some change in offset when changing the input signal path. Is the offset still within the typical ADC offset specifications? For offset calibration, refer to Figure 58... Make sure you keep the SYNC pin high, and issue the SDATAC, SYNC, & RDATAC commands. Once /DRDY goes low, then send the SDATAC, OFSCAL, and RDATAC commands to perform the calibration. Once /DRDY goes low again, you can read back the calibration registers to the see the result. Best regards, Chris
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Forum Post: RE: ADS1281: ADS1281 low frequency low level tones - other than idle tones
Hi Miguel, Ok, I just wanted to be sure that the idle tone was present in the combined filter response. Do you have any other clocks or switching power supplies in your system that might have a frequency close to the ADC's modulator clock frequency (fclk/4)? Signals around mod clock frequency could alias back into the passband. Does the issue persist even after resetting the ADC or power cycling the system? Have you seen any cases where moving a "bad" part on to a known good board has resulted in the the problem following the part? I'm not aware of any cases of similar device behavior, therefore, this sort of test might help determine if this is a system- or device-level issue. If everything points to a device-level issue then would could consider returning some of the bad devices to run them through our tests again. Best regards, Chris
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Forum Post: TLV320AIC3104: TLV320AIC3104 ,I use two mode of this device , 1. one balanced microphone in put and two line input mode .2. four balanced microphone in put mode .please help check the sch , if there any not match or wrong ,many thanks !
Part Number: TLV320AIC3104
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