Uttan-san Thank you for reply, I mistaken " ADS7822 ", DAC7822 is correct. I answer your question below 1. Output type is AC (sin wave). 2~5. Customer is not fix detail spec, it is OK to match the DAC7822 specification. 6. Additional information is three points below; ・Customer application is feedback line of resolver, input side is connecting ADS1209 . ・Sampling frequency is 5MHz ×2ch ・Customer is considering TL074 for output side, is there problem? Best regards, Satoshi
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Forum Post: RE: DAC7822: Question about internal resistor and output voltage
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Forum Post: ADS8685: Can't read out the data correctly
Part Number: ADS8685 hello, I hava tried to send Frame 1) Write Command Drop CS and issue write command: D024 5555 Raise CS Frame 2) Read Command Drop CS and issue read command: C824 0000 Raise CS Frame 3) Read Register Value Drop CS, but do not provide any commands on the MOSI 0000 0000 Raise CS The result is 5555,that's right. Then I tried to test. Firstly I send D014 0008 to make 0 to 12.288V Then I tried to send only 0000 0000 to read out the ad value,all I get were not what I expect.I measured the voltage,1.8V. But the read result is 0x0581. If I do not send D014 0008 ,after send 00000000, the result is 0x86d3 when 1.8v,0x6300 when 0v. I'm not sure what was wrong.I need some help,thanks.
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Forum Post: RE: ADS54J42: Cannot configure the digital pages (6800, 6900 or 6A00)
Thank you. We hope there are more test modes available than documented. As a chip designer I would be surprised if not... In your reply you wrote: "You will have to do these writes to get an output" Did you intend to give examples of what is neede to write but fogot? We also would like to get a more precise requirement of the power on sequence than "which can be in orders of microseconds, but is recommended to be a few milliseconds" If there is a problem with power up sequence the impact is problems with loading default values to registers. Could our type of problems be related to this or other undocumented power up problems even if we comply to the "in orders of microseconds"? Can you please check what type of problem was the cause of the change of the power on sequence in the datasheet? Regards Björn
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Forum Post: RE: TLV320AIC3268: AD/DA make TLV320AIC3268 output nothing
Dear Diego, Thanks for your reply. Do you have some progress of the issue？ Best regards.
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Forum Post: PCM2706C: USB Audio codec : 24 bit DAC and Sampling Rates: 48 kHz
Part Number: PCM2706C Hello, Could you please suggest any USB audio codec with the following specification? 24 bit DAC Sampling Rates: 48 kHz We had found PCM2706C , but its DAC resolution is 16 bit. Regards Jom Sabu.
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Forum Post: LM49352 do not work
Hello, We're using LM49352 as an audio codec. The project basic information list as bellows, Linux Kernel -- 3.14.52 Audio formats -- PCM (slave) NO MCLK, use PORT1_CLK （2.048MHz） sampling frequency -- 8kHz Registers config : { 0x00, 0x29 }, { 0x01, 0x01 }, { 0x10, 0x03 }, { 0x20, 0x12 }, { 0x30, 0x11 }, { 0x44, 0x09 }, { 0x50, 0x21 }, { 0x54, 0x1b }, { 0x55, 0x02 }, { 0x56, 0x02 }, But， the codec is not working. Can any one help me here, thanks in advance!
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Forum Post: RE: PCM5102A: can PCM5102 be damaged , if DVDD supply is 0 V (short to GND) ?
Hello, the idea, to look at actual current, and compare to datasheet - was really helpful. i found a problem with a connection - L/R clock had a bad solder contact (maybe this make the chip try PLL on, then off, and on...) ; now current is about 1mA (no clocks), 22mA (clocks , 0 data) and 33mA (clocks and data); this seem correct - and signal coming out. fine. thanks Paul ! best regards Alfred
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Forum Post: RE: tlv320aic3100: tlv320aic3100 headset detection
Hello Diego, Thank you for the quick reply. Yes I'm reading the D6-D5 bits for register 0-67, there also the headset is not getting identified. D6-D5 bits are set to 0. And my custom board is having linux kernel using this driver: sound/soc/codecs/tlv320aic31xx.c, in this driveri have created "proc" read/write methods to read/write the codec registers. Here is the register map: static const struct snd_soc_dapm_route aic31xx_audio_map[] = { /* DAC Input Routing */ {"DAC Left Input", "Left Data", "DAC IN"}, {"DAC Left Input", "Right Data", "DAC IN"}, {"DAC Left Input", "Mono", "DAC IN"}, {"DAC Right Input", "Left Data", "DAC IN"}, {"DAC Right Input", "Right Data", "DAC IN"}, {"DAC Right Input", "Mono", "DAC IN"}, {"DAC Left", NULL, "DAC Left Input"}, {"DAC Right", NULL, "DAC Right Input"}, /* Mic input */ {"MIC1LP P-Terminal", "FFR 10 Ohm", "MIC1LP"}, {"MIC1LP P-Terminal", "FFR 20 Ohm", "MIC1LP"}, {"MIC1LP P-Terminal", "FFR 40 Ohm", "MIC1LP"}, {"MIC1RP P-Terminal", "FFR 10 Ohm", "MIC1RP"}, {"MIC1RP P-Terminal", "FFR 20 Ohm", "MIC1RP"}, {"MIC1RP P-Terminal", "FFR 40 Ohm", "MIC1RP"}, {"MIC1LM P-Terminal", "FFR 10 Ohm", "MIC1LM"}, {"MIC1LM P-Terminal", "FFR 20 Ohm", "MIC1LM"}, {"MIC1LM P-Terminal", "FFR 40 Ohm", "MIC1LM"}, {"MIC1LM M-Terminal", "FFR 10 Ohm", "MIC1LM"}, {"MIC1LM M-Terminal", "FFR 20 Ohm", "MIC1LM"}, {"MIC1LM M-Terminal", "FFR 40 Ohm", "MIC1LM"}, {"MIC_GAIN_CTL", NULL, "MIC1LP P-Terminal"}, {"MIC_GAIN_CTL", NULL, "MIC1RP P-Terminal"}, {"MIC_GAIN_CTL", NULL, "MIC1LM P-Terminal"}, {"MIC_GAIN_CTL", NULL, "MIC1LM M-Terminal"}, {"ADC", NULL, "MIC_GAIN_CTL"}, /* Left Output */ {"Output Left", "From Left DAC", "DAC Left"}, {"Output Left", "From MIC1LP", "MIC1LP"}, {"Output Left", "From MIC1RP", "MIC1RP"}, /* Right Output */ {"Output Right", "From Right DAC", "DAC Right"}, {"Output Right", "From MIC1RP", "MIC1RP"}, /* HPL path */ {"HP Left", "Switch", "Output Left"}, {"HPL Driver", NULL, "HP Left"}, {"HPL", NULL, "HPL Driver"}, /* HPR path */ {"HP Right", "Switch", "Output Right"}, {"HPR Driver", NULL, "HP Right"}, {"HPR", NULL, "HPR Driver"}, }; thanks, aniket
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Forum Post: TLV5604: TLV5604 output query
Part Number: TLV5604 Hi Please help check the attached schematic and waveform. The problem is out A~D ripple high voltage. The change of CS and FS (Linux system, the system will start to work after 10s power on) : Thanks Star
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Forum Post: RE: ADS1298RECGFE-PDK: issues on reading respiration from a real patient
Hi Ryan, thank you very much for your availability, you've been very clear. Best regards: Manuel Bonini.
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Forum Post: RE: ADS54J60EVM: Inconsistent setup behaviour
The literature for the Xilinx JESD204 core (pg066) is very clear that the core clk should be 1/40 of line rate. I'm pretty sure that for our 8224 setup the line rate is 5Gbps so the core clock should be 125MHz. The refClk (that powers the GT tiles) could be 250MHz and as i've stated I have tried this method but not had any stable results either. Have you any idea why the ADC becomes unresponsive. Sometimes i'm able to use the GUI to do software SYNC or force an ILA pattern but then other times none of the writes seem to take and read backs of already set registers come back with zeros so it's very hard to confirm what settings the ADC is using in this state.
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Forum Post: RE: RE: ADS1120 Configuration registers
Hi Bob. Thank you. I send you a schematic of one analogical cell of equipment. This equipment have 8 cells with two inputs for cell. And all cells are controlled with a CPLD. If you need all schematic I send you, no problem. The circuit work correctly if I connect de resistors R35 and R43, the detection is ok with this configuration. These resistor fix the negative input to GND of the cell, erase or match the potential. With this configuration the circuit work correct. But I need that the two inputs of ADC is working with true differential configuration. When I have done a test without the resistors many inputs work correctly, the offset is 0 or ±1, but some inputs begin to work bad, and this inputs measure one offset that it can be between 12 and 180 points. The problem, I suppose, it is generated for noise or differences between potential of input and the analog GND of ADC. The inputs only have the capacitors (162, 163, 165, 167) for interconnect or match the input with the analog GND of ADC. I think that it is the problem but I don't understand where I have a problem and how I can erase the problem with the potential. The circuit have one change. AVss is 2V7 and AVdd is -2.7. At the initial this voltage was 3V3 and -3V3, but during the test I changed the voltage. I think that it was not necessary but i have fixed it to 2V7. The GND of the cell is the same for the digital and analog part but i have rutted the digital and the analog for different parts of the cell and only I put together near the GND of ADUM or negative pin of C90. Thank you. David. (Please visit the site to view this file)
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Forum Post: PGA309: Multi Cal DMM Script
Part Number: PGA309 Dear team, Currently, My customer use Multi Cal system with Agilent 34401A DMM to communicate with RS232 on the computer. But they want to change DMM band from Agilent to other band like Tektronixs. To use other DMM band, how can I and witch point have to change script? I found Script Reads Voltage on Agilent 34401A with RS-232 Port on the Computer at Multi-Cal-PGA309 System user guide like below 1. Is it possible to use other DMM band if change this point "write> MEAS:VOLT:DC? 10,0.00001"? If I change the other point, please let me know. 2. How about Script for current? I can not find current script. Thank you.
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Forum Post: Linux/TLV320AIC3106: tlv320aic3106
Part Number: TLV320AIC3106 Tool/software: Linux Hello Sir, I am using tlv320aic3106 audio codec ic to play my wav file. The audio which i could able to hear is too fast .can you suggest what changes do i nedd to make either in the alsamixer or in the driver to play the audio at a proper speed. &am33xx_pinmux { bone_audio_cape_audio_pins: pinmux_bone_audio_cape_audio_pins { pinctrl-single,pins = ; } } sound { compatible = "ti,da830-evm-audio"; ti,model = "DA830 EVM"; ti,audio-codec = ; ti,mcasp-controller = ; ti,codec-clock-rate = ; ti,audio-routing = "Headphone Jack", "HPLOUT", "Headphone Jack", "HPROUT", "Line Out", "LLOUT", "Line Out", "RLOUT", "LINE1L", "Line In", "LINE1R", "Line In"; }; &i2c0 { pinctrl-names = "default"; pinctrl-0 = ; status = "okay"; clock-frequency = ; tlv320aic3x: tlv320aic3x@18 { compatible = "ti,tlv320aic3x"; reg = ; status = "okay"; ldoin-supply = ; iov-supply = ; dv-supply = ; av-supply = ; }; &mcasp0 { pinctrl-names = "default"; pinctrl-0 = ; status = "okay"; op-mode = ; /* MCASP_IIS_MODE */ tdm-slots = ; num-serializer = ; serial-dir = ; tx-num-evt = ; rx-num-evt = ; }; with regards prakash
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Forum Post: ADS1218: Data Reading Problem
Part Number: ADS1218 Hi, I am trying to configure my ADS1218 with arduino board. I am using following setting: AVCC = 5 v Unipolar Decimation 1920 Digital filter SINC3 I perform calibration with buffer off and turn it on after calibration. I am applying 1.3 Vdc on channel Ain0 and Ain1 by setting the MUX to 0x01, fMOD = 9600 hz Problem is that after calibration I read 0.00 all the time regardless of input which I can vary from 0 to 2 volts. If I use it without calibration I get 2.5 V all the time regardless of input which I can vary from 0 to 2 volts. Here is my code: /************************************************************** Aalto_ADS1218.ino this example gives differential voltage across the AN0 And AN1 in uV Hooking-up with the Arduino |ADS1218 pin label| Pin Function |Arduino Connection| |-----------------|:--------------------:|-----------------:| | DRDY | Data ready Output pin| D6 | | MISO | Slave Out | D12 | | MOSI | Slave In | D11 | | SCLK | Serial Clock | D13 | | CS | Chip Select | D7 | | DVDD | Digital VDD | +5V | | DGND | Digital Gnd | Gnd | | AN0-AN3 | Analog Input | Analog Input | | AVDD | Analog VDD | - | | AGND | Analog Gnd | - | *************************************************************/ #include #define SPI_MASTER_DUMMY 0xff #define RESET 0x06 //Send the RESET command (06h) to make sure the ADS1220 is properly reset after power-up #define START 0x08 //Send the START/SYNC command (08h) to start converting in continuous conversion mode // define the ads1218 command #define RDATA 0x01 // read the latest ad conversion data #define RDATAC 0x03 // continuously read the converted data #define STOPC 0x0F // Stop continuous read mode #define RREG 0x10 // Two-byte command to read register contents First byte: bit3-bit0 = 0-16; #define RRAM 0x20 // two-byte command to read the contents of the first byte ram: bit3-bit0 = 0-16; #define CREG 0x40 // copy the contents of the register to the specified ram bank, the lower three bits specify the ram page address #define CREGA 0x48 // copy the contents of the register into all ram banks. #define WREG 0x50 // 2 byte command, write data to register 0-15 #define WRAM 0x60 // 2 bytes instruction, write data to 128 bytes in ram #define RF2R 0x80 // read the data of the specified FLASH page into 128 bytes of RAM #define WR2F 0xA0 // Write the data in ram to the specified FLASH page #define CRAM 0xC0 // Copy the selected ram data into the configuration register, which will overwrite the current working register contents #define CSRAMX 0xD0 // Calculate the checksum in the specified page ram, do not include ID, DRDY DIO #define CSARAMX 0xD8 // Calculate the checksum in all rams, do not include ID, DRDY DIO #define CSREG 0xDF // Calculate the checksum of the configuration register #define CSRAM 0xE0 // Calculates the checksum in the specified page ram, containing all bits #define CSARAM 0xE8 // Calculates the checksum in all rams, containing all bits #define CSFL 0xEC // Calculate the checksum in all FLASH, including all bits #define SELFCAL 0xF0 // Offset and gain self-calibration #define SELFOCAL 0xF1 // offset self-calibration #define SELFGCAL 0xF2 // gain self-calibration #define SYSOCAL 0xF3 // System Offset Calibration #define SYSGCAL 0xF4 // System Gain Calibration #define DSYNC 0xFC // Sync DRDY #define SLEEP 0xFD // sleep mode #define RESET 0xFE // reset the register to the power of the data, stop the continuous read mode, does not affect the ram data // define the ads1218 register Addresses #define SETUP_REG_ADRS 0x00 #define MUX_REG_ADRS 0x01 #define ACR_REG_ADRS 0x02 #define IDAC1_REG_ADRS 0x03 #define IDAC2_REG_ADRS 0x04 #define ODAC_REG_ADRS 0x05 #define DIO_REG_ADRS 0x06 #define DIR_REG_ADRS 0x07 #define DEC0_REG_ADRS 0x08 #define DEC1_REG_ADRS 0x09 #define OCR0_REG_ADRS 0x0A #define OCR1_REG_ADRS 0x0B #define OCR2_REG_ADRS 0x0C #define FSR0_REG_ADRS 0x0D #define FSR1_REG_ADRS 0x0E #define FSR2_REG_ADRS 0x0F #define ADS1218_CS_PIN 7 #define ADS1218_DRDY_PIN 6 void writeRegister(uint8_t address, uint8_t value) { uint8_t numReg = 0x01; noInterrupts(); digitalWrite(ADS1218_CS_PIN, LOW); // delayMicroseconds(500); SPI.transfer(WREG | address); SPI.transfer(numReg); SPI.transfer(value); // delayMicroseconds(500); digitalWrite(ADS1218_CS_PIN, HIGH); interrupts(); } uint8_t readRegister(uint8_t address) { uint8_t data; uint8_t numReg = 0x01; noInterrupts(); digitalWrite(ADS1218_CS_PIN, LOW); // delayMicroseconds(500); SPI.transfer(RREG | address); SPI.transfer(numReg); delayMicroseconds(20); // delay of 10 uS needed data = SPI.transfer(SPI_MASTER_DUMMY); // delayMicroseconds(500); digitalWrite(ADS1218_CS_PIN, HIGH); interrupts(); return data; } void printAllreg(void) { int read_data0; for (int i = 0; i <= 15; i++) { read_data0 = readRegister(i); Serial.println(read_data0, HEX); delay(10); } } void SendSELFCALCommand(void) { noInterrupts(); digitalWrite(ADS1218_CS_PIN, LOW); delayMicroseconds(500); SPI.transfer(SELFCAL); delayMicroseconds(500); digitalWrite(ADS1218_CS_PIN, HIGH); interrupts(); delay(2000); } void syncSerialData(void) { noInterrupts(); digitalWrite(ADS1218_CS_PIN, LOW); delayMicroseconds(500); SPI.transfer(DSYNC); delayMicroseconds(500); digitalWrite(ADS1218_CS_PIN, HIGH); interrupts(); delay(2000); } void waitForDataReady(int timeOut) //wait for data ready { // wait for /DRDY = 1 while ((digitalRead(ADS1218_DRDY_PIN)) != LOW); // wait for /DRDY = 0 while ((digitalRead(ADS1218_DRDY_PIN)) == LOW); } uint32_t Read_Data(int passFlag) { uint32_t dataBits = 0x0000; if (passFlag) { waitForDataReady(0); noInterrupts(); digitalWrite(ADS1218_CS_PIN, LOW); //Take CS low // delayMicroseconds(500); SPI.transfer(RDATA); delayMicroseconds(20); byte msbData = SPI.transfer(SPI_MASTER_DUMMY); byte midData = SPI.transfer(SPI_MASTER_DUMMY); byte lsbData = SPI.transfer(SPI_MASTER_DUMMY); // delayMicroseconds(500); digitalWrite(ADS1218_CS_PIN, HIGH); // Clear CS to high interrupts(); dataBits = msbData; dataBits = (dataBits << 8) | midData; dataBits = (dataBits << 8) | lsbData; } return dataBits; } void setup() { digitalWrite(ADS1218_CS_PIN, HIGH); pinMode(ADS1218_CS_PIN, OUTPUT); Serial.begin(9600); //115200 57600 SPI.begin(); // wake up the SPI bus. SPI.setBitOrder(MSBFIRST); SPI.setDataMode(SPI_MODE1); SPI.setClockDivider(SPI_CLOCK_DIV64); writeRegister(0x00, 0xfc); //0000 1100 ,buffer disabled. delay(50); writeRegister(0x08, 0x80); // Decimation register 1, DEC0 delay(50); writeRegister(0x09, 0x77); // Decimation register 2, DEC1, unipolar, SINC3 filter set delay(50); printAllreg(); delay(5000); SendSELFCALCommand(); delay(5000); writeRegister(0x00, 0xfe); //0000 01110 ,buffer enabled, fMOD = 9600 delay(50); writeRegister(0x08, 0x80); // Decimation register 1, DEC0 delay(50); writeRegister(0x09, 0x77); // Decimation register 2, DEC1, unipolar, SINC3 filter set delay(50); writeRegister(0x01, 0x01); // set MUX delay(50); syncSerialData(); // Sync Data Ready with Serial clock edge delay(50); printAllreg(); } void loop() { uint32_t data32 = 0; data32 = Read_Data(1); float value = (float(data32) * 2.5 * 1000000) / 16777216; Serial.print(" 32bit BIN : "); Serial.println(data32, BIN); Serial.print(" Value : "); Serial.println(value, BIN); delay(50); } Here is my schematic: Any suggestions??? Thanks in advance, Tanweer
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Forum Post: Linux/TLV320DAC3203: TLV320DAC3203 linux driver
Part Number: TLV320DAC3203 Tool/software: Linux Hello, Could you send me the linux driver for TLV320DAC3203 ? Linux kernel versions is 4.1.15. Thanks and best regards, Victor Chen
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Forum Post: RE: ADC31JB68: K28.5 data not always sent after power-up, when sync is low
Hi Andrew, I am looking into this issue, and will get back with you soon. Are you using the ADC31JB68EVM ? Can you please provide the register settings that you are writing to the ADC? Regards, Dan
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Forum Post: ADS8900BEVM-PDK: PHI Driver Installation
Part Number: ADS8900BEVM-PDK Using a Dell Ultrabook running Windows 10, I am unable to install the driver for the PHI, but I was able to install the driver for the PSI portion of the evaluation module. Both the ADS8900 EVM and PSI EVM successfully installed. What should I do?
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Forum Post: RE: ADC31JB68: K28.5 data not always sent after power-up, when sync is low
We're not using the evaluation board, this is our own custom design. All register values are as power on default.
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Forum Post: RE: ADS8900BEVM-PDK: PHI Driver Installation
I meant to say both GUI's installed.
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