Hi Phil, Instead of toggling the START pin with each conversion, you can hold the START pin high and you'll see /DRDY start to toggle at the data rate period. Each time you stop and start the conversion, the digital filter will be reset and /DRDY will be delayed by the conversion latency. Note that writing to certain device registers (such as the input mux) will also cause the conversion to restart and will require this delay as well. Best regards, Chris
↧
Forum Post: RE: ADS1262: Data rate
↧
Forum Post: RE: ADS54J60: Data sampled from ads54j60 is wrong,need you suggestion.
Hello User, The 4th of July holiday may delay a response to your question, but you can expect someone to get back to you after the 4th. thank you for your patience. -Steve Wilson
↧
↧
Forum Post: RE: ADS54J60: Data sampled from ads54j60 is wrong,need you suggestion.
Hello Based on your register write sequence I don't think you are setting the state of the SCRAMBLE EN bit (Register Address 5, Bit 7 in the JESD DIGITAL PAGE). If scrambling is enabled in the ADC and not enabled in your FPGA processing that may be the cause of the incorrect data you are seeing. Best regards, Jim B
↧
Forum Post: RE: ADS124S08EVM: Delta Sigma EvaluaTIon Software: How to save data without Data analysis tab
Hi Michael, The biggest issue with data collection is with the memory structure in the GUI. We had initially hoped that we could have collected large sample sizes, but from our testing we appear to be limited to about 200k to 250k samples. We will be moving away from the current GUI in about a month or so. Because of this all bug fixes and development of the current GUI has stopped. The data file can only be saved once the data has completed collection. If the memory becomes corrupted, then all previous data will be lost. I am not the one testing the new GUI, so I do not know if the length of data capture has improved. At this time we do not have documentation regarding usage outside of the GUI. I would suggest that an external processor be connected to the J3 digital connector and the onboard Tiva processor be disabled. In this way data can be collected over any length of time or number of samples required. The J3 digital connections used are shown in section 3.2.3 of the ADS1x4S08EVM user's guide. You can use the USB power if you hold the Tiva in a reset condition. This will prevent the level shifters from enabling and allow connection to the J3 connector. The Tiva can be held in reset by adding a shorting jumper at JP1. Best regards, Bob B
↧
Forum Post: RE: ADC08200: ADC08200
Hi Svetlana Due to the lack of a dedicated output Data Clock, and the relatively large output Delay and Hold times (and min/max variation of those times) for Data with respect to the input Clock, it can be somewhat challenging to reliably capture data from the ADC08200 . For this reason the ADC08B200 is an alternative device, with Data Clock, that should be considered. The best configuration is to utilize a capture FPGA that can adjust the Data strobe instant with respect to the ADC input Clock. The delay can be swept over a range and the points of data instability found, then the delay set to provide maximum capture timing margin. Since there is no data test pattern available, this method requires some knowledge of the input signal, ideally setting the signal at midscale to give data values near the 7Fh, 80h transition point. I hope this is helpful. Best regards, Jim B
↧
↧
Forum Post: RE: ADS1262: Data rate
Many thanks, Chris. I figured it out just right before your answer, thank you for your confirmation. I need to add that the device must be configured to run in continuous mode (bit RUNMODE in register #03 set to 0). My conclusion would be to achieve high datarate, the device must run in continuous mode, otherwise the maximum conversion rate is limited by the first conversion delay. Is that correct? Kind regards, Phil
↧
Forum Post: RE: DAC5681: Please let me check about required specification
Hi Satoshi We're looking into this question and will reply as soon as possible. Best regards, Jim B
↧
Forum Post: RE: ADS1262: Data rate
Hi Phil, That is correct! And yes, the device run mode needs to be set for continuous conversion mode. Let me know if you have any other questions I can help with! Best regards, Chris
↧
Forum Post: Cross for the WM8962
Hi Team, Do we have a device that is competitive with the WM8962? Thanks, Jared
↧
↧
Forum Post: RE: Gerneral question about how to choose the right differential signal type for ADC
Hi user4090349, That really would depend on the actual ADC - you would want to look at the ABS MAX ratings of the device and see if you would be exceeding the rated limits of the input. Generally speaking, pseudo differential input ADC's have a limited voltage input range on their (-) input pins. Take a look at the ADS8362 as an example; it can handle -0.3 to VDD +0.3 V on both inputs (ABS MAX table on pg. 2), but the actual analog input range on -IN is only -0.3 to 0.5 MAX (Recommended Operating conditions, pg 3).
↧
Forum Post: RE: ADS8689: SPI - Sending READ command but getting zeros
Linus, 1. I think you are communicating correctly, and getting the expected results. 2. The read command you are using is an 8 bit read. See page 54 in the data sheet. You may want to use the 16 bit read to get the full alarm threshold register. Now you are getting only 8 bits. 3. The data can only be read in the next frame after issuing the read command (the 32 BIT transaction you show). So, if you repeat the command twice, you will see valid data on MISO corresponding to the register you selected in the first command. 4. I believe that you have issued the command shown more than once, so you are reading the correct value for the ALARM_H_TH_REG here. The default for thisregister is FFFFh. So, you are reading the first byte of this register. If you used a 16 Bit read you could get the entire FFFFh. 5. I suggest that you use write the register first and then read the device to confirm that you are getting back what you wrote. 6. I suggest using the 16 bit write and read (READ_HWORD, and WRITE_HWORD). I think this will simplify your software as you will not have to do as many writes. 7. The readback is the first byte in this example (FFh). This is the readback for the previous frame. I hope this helps.
↧
Forum Post: RE: matlab code to calculate SNR,SNDR,THD SFDR
Hello Sina Kamar! Calculating SNR, THD, SFDR, and SINAD from an FFT is relatively straightforward. I do not have Matlab code for this, but here is the process, assuming you start with a complex FFT generated by Matlab. Also, I am assuming that your input frequency is "Mutually Prime Coherent" with your sample frequency, which will result in your fundamental showing up in only one bin of your FFT. 1. For each bin of your FFT, take (the square root of the sum of the squares of the real part and the imaginary part) / (2^(2* NumberOfADCBits) to obtain a Power half-FFT. Stop the loop so that the highest bin of the FFT is the Nyquist bin. (Use something like "0 to BinCount/2 -1".) 2. Remove the DC bin (element 0) by setting it to the minimum value of the rest of the FFT elements. SFDR: The formula is SFDR = 10 * log10( FundamentalPower / MaxSpurPower). MaxSpurPower is maximum power in the FFT power array that is not the fundamental. (Probably the second greatest element of the array.) SINAD: The formula is SINAD_Power = (sum of all powers in FFT array) - FundamentalPower. Because of crazy FFT artifacts in the FFT that occur near the zero bin and the Nyquist bin, you may want to subtract those from the result. Also, when frequencies cannot be exactly coherent (which is almost always), you may want to subtract the powers in about 3 bins on either side of the fundamental as well. SINAD = 10 * log10( FundamentalPower / SINAD_Power ) THD: We normally consider 10 harmonics of the fundamental. (2x the fundamental, or the second harmonic, would be the first one considered. So considering 10 harmonics means harmonics 2 through 11 are considered.) For each harmonic, you need to know what bin it shows up in. 1. BinNumber = (HarmonicNumber * FundamentalBin) mod NumberOfFFTbins (This finds the number of bins from the fold.) 2. FoldCount = ConvertToInteger( (HarmonicNumber * FundamentalBin) / NumberOfFFTbins) 3. If FoldCount is even, HarmonicBin = BinNumber. If FoldCount is odd, HarmonicBin = NumberOfFFTbins - BinNumber. Harm_Power = sum of the powers in all of the (considered) harmonic bins. THD = 10 * log10( Harm_Power / FundamentalPower) SNR: Noise_Power = SINAD_Power - Harm_Power SNR = 10 * log10( FundamentalPower / Noise_Power) You can use this as a guide for developing your Matlab code. Hope this helps!
↧
Forum Post: RE: ADS124S08: Can the REFOUT/REFCOM pins be used as a third reference sense input?
Hi Rick, I think I found the thread you were referring to in your initial post. https://e2e.ti.com/support/data_converters/precision_data_converters/f/73/p/569848/2097353#2097353) As you require one different input/reference combination you can do something similar to the design in the post. The first and last RTD would be the same. The one in the middle would differ by using a high-side reference through the REF1 pair. One current source would come out of REFP1 and the second from AINCOM. The design would appear as follows: Best regards, Bob B
↧
↧
Forum Post: RE: ADS8568: ADS8568 wake up issue
Nir: Because there are two ADS8568 's in your design, and consistently only the one on the bottom of your PCB is giving you trouble, I would suggest taking a close look at the layout, including decoupling of the supplies. Would you be able to send partial schematics and layouts? Thank you!
↧
Forum Post: RE: Cross for the WM8962
Hi, Jared, I would recommend to take a look at the TLV320AIC3262 and the TLV320AIC3268 . These devices can be used to replace the WM8962. Best regards, Luis Fernando Rodríguez S.
↧
Forum Post: DAC38RF82: Generating an ARB with DAC38RF82EVM and TSW14J56
Part Number: DAC38RF82 I wanted to ask this first before buying the DAC38RF82EVM and TSW14J56 boards. In the DAC38RF82 datasheet an 8-bit direct output mode is shown on page 23, fig.25. Is that mode available within the Demo GUI software? For my initial application I just need to constantly output a sawtooth signal at a 400MHz rep rate(approximatly). So I thought I would set a 22 or 23 sample long waveform and keep that looping forever. Is this perhaps a bit to simplistic? Is there a larger minimal waveform length, or does the length need to be a multiple of a certain number of samples?
↧
Forum Post: TVP5158: TVP5158
Part Number: TVP5158 Please provide the EXACT replacement for TVP5158 (NRND) IC., which has 'independent scalers' to support various output resolution after NTSC/PAL decoding
↧
↧
Forum Post: RE: ADS8688: Only receive 0xFFFF from SDO
Khoi, Some items to consider: 1. Look at figure 81 in the data sheet. You are trying to use the “auto channel sequence with reset”. To do this you should clock through all 32 clocks, and raise chip select. During the next frame, you will get the sampled results for the first channel in the “auto-channel sequence”. If left in the default mode all the channels will be scanned. 2. I don’t see the full 32 bit frame, nor do I see the chip select raised before the next frame. The next frame is when you will get the data for the samples from the first channel. I think you are looking at this frame, but should actually be looking at the next frame. 3. Look at figures 81 and 82 for guidance. At the end of the 32 bit AUTO_RST command, you will need to raise chip select. The next frame (lower chip select and clock 32 times) is where you will get the data. Note that SDI is held low for this frame. Also, SDI will be held low for subsequent frames to continue the auto-channel sequence. 4. You should look at the data with an oscilloscope. I’m not sure what utility you are using to display the waveforms, but I suspect that it comes directly from the microcontroller. This will not let us see if there is timing or data corruption issues. A digitizing scope will show the wave shape and actual data on the different SPI pins. I highly suggest that you connect to a digitizing scope to debug your issue. I hope this helps, let me know what you find.
↧
Forum Post: ADS131E06: why does input referred noise with PGA gain
Part Number: ADS131E06 Page 16 of the ADS131E06 datasheet states that increasing PGA reduces input-referred noise. Why is this? Is there a formula to determine how much the input-referred noise is reduced? I'd guess the input referred noise is reduced by the gain. Regards, Dave
↧
Forum Post: RE: PCM1864 with 2 I2S/ TDM input and mixed as single TDM output
Hi, Terry, Thanks for the additional feedback. Unfortunately we don't have a simple device capable to only mix two I²S signals. We have a couple audio codecs (like TLV320AIC3262 ) that have up to three audio serial interfaces that can be mixed internally by using the integrated miniDSP of the codec, but probably this would be an overkill for just the I²S mixing function. Best Regards, -Diego Meléndez López Audio Applications Engineer
↧