Forum Post: RE: ADC128s102 - split of total supply current (Ia=? Id=?)?
Hi Paul,I am glad we were able to help you.Take care.Sincerely,tom
View ArticleForum Post: RE: TSW1400
Hello TI , After reading ADS5402 document I see that auto correction flag is disabled by default.After enabling , I see SNR improve from 29dB to 49 dB and improvements in SFDR as well.Question : I read...
View ArticleForum Post: RE: Question for DAC3484 register
answered on the newest forum post:http://e2e.ti.com/support/data_converters/high_speed_data_converters/f/68/p/289451/1010150.aspx#1010150-Kang
View ArticleForum Post: RE: Source code DSP TMS230 for the MMB0 with ADS1299 EEG FE
You should receive an email shortly with the requested information
View ArticleForum Post: RE: Password required for...
You should receive an email with the password information shortly
View ArticleForum Post: RE: ADS4249EVM
Hi,Please also check the ADC sampling clock going through J19 on ADS42xxEVM.Thanks,KW
View ArticleForum Post: RE: ADS1258 Noise Issues
Hi Chris,Thanks for the prompt reply. We're working on taking the FFT now and we'll see if there are any harmonics. When shutting off the ADC (via the crystal), we do see a noise reduction on the noisy...
View ArticleForum Post: RE: ADS1115 not finishing conversion
Hi Ben,since I managed to write the configuration register of ADS and read the same values backfrom it then I assume that the communication between the ADS and uC should havebeen correct. The signal I...
View ArticleForum Post: RE: ADS130E08 manual sampling trouble
Yes, it is another option, but I need to sample at a frequency multiple of 6.400 Hz but the ADS130E08 maximum sample rate is 8 kSPS. ADS131Exx maximum sample rate is 64 kSPS. Probably I need to use...
View ArticleForum Post: RE: TLV320ADC3101EVM about "mute" in the "Audio Recording window"
This is an analog mute that will mute the analog input into the ADC however, the digital output is not muted by this. There will still be some small random noise. You can disable the digital output in...
View ArticleForum Post: RE: AIC34_CODEC_CLKIN_MUX.
Hi:We found that if we program N of the divider after the PLL is enabled, i.e., execute the sequence below, then we are able to generate the clock on GPIO1-A. However, if we swap the first two lines of...
View ArticleForum Post: RE: ADS1278 problem with DRDY going low during reads
Mr Evans -The DRDY signal will occur at the data rate of the ADC (based on mode and CLK). When reading the data, you must read ALL channels of data of interest before the next DRDY pulse. If you do...
View ArticleForum Post: RE: Question for the Sidelobe noise and PLL Unlock of DAC3484
Thank you your answer.Do you have solution(4ch DAC) as below condition?- Input rate : 138.24MHz- Interpolation : 2X- Digital mixer Enable : Fs/2- NCO : DisablePlease response ASAP
View ArticleForum Post: TSW1400 and DAC3482EVM interface
Hello,I am trying to test the DAC3482EVM by connecting it to TSW1400EVM. I am unable to see any spectrum in the Spectrum Analyser. I am following the user guide of DAC3482EVM. Could you please let me...
View ArticleForum Post: RE: ADS1147 misbehavior at random condition
Hi Saravanan,welcome to our forum and thank you for your interest in the ADS1147.Would you mind sending us the schematic of your implementation and how you test for an open RTD?If you use a ratiometric...
View ArticleForum Post: RE: ADS 1299 Testboard SPI Interface
Ms Jung -All of the circuitry for the ADS1299EVM is present in the user guide. The schematic exists on multiple pages, so perhaps this section was overlooked.
View ArticleForum Post: RE: ADS8528 tDCVB max
Hi Reed,For the ADS8528, the expectation is that there will be 32 clocks, with the first four output bits being 'zero' followed by the 12-bit conversion result of CHx0. From there, the device will...
View ArticleForum Post: RE: TVP5151 problem on s1d13515
Move the scope trigger point down so that it only catches the low going sync tip hence will display a stable line image. This will make the scope captures much easier to see.As a test try swapping the...
View ArticleForum Post: RE: TVP5151 firmware patch
Hi SteveThat is what I expected and at a 29.5 MHz clock rate there will be 768 pixels per row.
View ArticleForum Post: RE: TSW1400 DAC3482EVM and ADS4249EVM
Hi,From HSDC Pro (TSW1400 GUI) point of view, only one path between transmission and receiver can be recognized at a time.1) But you can connect DAC to TSW1406 and ADC to TSW1405 at the same time with...
View Article