Hi:
We found that if we program N of the divider after the PLL is enabled, i.e., execute the sequence below, then we are able to generate the clock on GPIO1-A. However, if we swap the first two lines of the sequence below, then there is no clock output on GPIO1-A.
The question is: Would this guarantee synchronization of codecs A and B?
Thanks a lot!
Cheers,
Mushtaq
i2cset -f -y 1 0x18 0x03 0x91
i2cset -f -y 1 0x18 0x66 0x48
sleep 1
#Enable clock on GPIO1-A.
i2cset -f -y 1 0x18 0x62 0x30