Forum Post: RE: ADC12D1800RFRB/NOPB evaluation board - USB and FPGA speed issue
Thank you Marjorie!I believe the second suggestion is best for me.
View ArticleForum Post: RE: ADS8568 evaluation module available separate from performance...
Hi Tom,Thank you for the answer.Do you know if it will be available without the kit one day? If so, do you know when?We really do not need this kit which comes with the ADS8568EVM.Thank you,Marc
View ArticleForum Post: RE: ADS1224 noise
Hi Steven,We will be releasing a new part, the ADS1220, in a couple of weeks that may be of interest. It is less complex in terms of communication and register set compared to the ADS1248, but retains...
View ArticleForum Post: ADS42P42 EVM: external SPI control
Hi,I presently have in hand a ADS62P42 EVM REV.B. What i would like to accomplish is to use your eval board but write myself into the registers without using the usb interface of parallel options...
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Wiki Page: Precision Data Converters on Analog Wire
Analog Wire is the analog signal chain solutions blog on TI's E2E Community. Come back here to view the complete list of Precision Data Converter blog entries.Precision DAC Blog Series:DAC Essentials:...
View ArticleForum Post: RE: [ADS41B29] just a little confused analog input pin is...
Hi Siwon,The input of the ADS41B29 is not 'fixed'. You are right, it depends on the driving circuit you use.The EVM for instance uses a double-transformer input circuit which is by default optimised...
View ArticleForum Post: RE: ADS1294R analog output error
Hello Ryan,Sorry for the delayed response.We are using single power supply (AVDD=3.3V,AVSS=GND). The VREFP-VREFN was 2.3V, which is close to the reference value as indicated. Do you mean that in single...
View ArticleForum Post: RE: TLV320DAC3202 I2C register access
Hi Steve,You can access the registers by writing a 1 unto 0x18 register address.Regards,Peter
View ArticleForum Post: RE: ADS1232 with +24V load cell excitation
Hi Jayaraj,The quick answer is you cannot directly connect the sensor outputs to the ADS1232. If you excite a bridge sensor with 24V, the balanced state for the bridge + and - inputs will be...
View ArticleForum Post: RE: 2 questions about ADS131E08
Mr Katchashkin -[quote user="Sergey Katchashkin"]1. Document SBAS561A-JUNE, 2012. Page 2. ABSOLUTE MAXIMUM RATINGS table. The string AGND to DGND -0.3 to +0.3 V. (The latest version of the row is...
View ArticleForum Post: RE: DAC7821 Positive Voltage Supply
Hi Kevin,I have nother following question for you. In the Figure 11, where should V_CM be connected?
View ArticleForum Post: RE: ADS1148 question
Bob, That's ok, but the behavior I am seeing is specifically related to the level of CS, keeping all other parameters the same. Are you saying there is a connection between CS and the internal...
View ArticleForum Post: RE: ADS1282 Filter Magnitude Response
Hi Ragon,I noticed that difference too. I am not sure if that is a result of the frequency step size or if Excel's 15 significant digits is more precise than the program that made the graph for figure...
View ArticleForum Post: RE: ADS5281 ..
Hey KW,ignore the previous reply kindly see disThanks for ur reply ...great job ...I appreciate ..i went through the document u told about the conversion of Lvds to Cmos compatible output..so my doubt...
View ArticleForum Post: RE: ADS7844 measured temperature drop by 40°C
Hi Ingemar,No it doesn't look like this kind of behavior has been reported before. What range of temperatures are you trying to measure? Are you utilizing the full dynamic range of the ADC? What [PD1...
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Forum Post: RE: ADS4245EVM CMOS mode
Those jumpers are setting correct. Here is the picture.
View ArticleForum Post: Digital Mic Interface using SDIN and GPIO clk
Per Audio CODEC TLV320AIC3100 datasheet, we can connect Digital microphone to SDIN input of CODEC, but only one serial Digital input pin is available, if i use that for microphone, how i can...
View ArticleForum Post: SRC4192 MCLK, BCLK setting issue
Dear Sir i have tested SRC4192 evaluation board and get below observation Setting 1. 16bit 44.1K signal input from SPDIF to CS8414 BCLK, data, LRCLK to SRC4192 2.SRC4192 clock source by PLL1705 with...
View ArticleForum Post: ADC12D1000 Master and Slave data timing
Hi all.There are the following questions about ADC12D1000.1. At Time of Combination of One Master-ADC and One Slave-ADC, For example, when one input signal is input into both a master and a slave,...
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