Forum Post: RE: THS8135 Negative Sync
Whilst technically not VESA compliant the most critical part of the VESA signaling is the deltas, not the absolute levels since pretty much all systems ultimately AC couple to the inputs. DC coupling...
View ArticleForum Post: RE: Measurement of Rp
Could you please post the voltage you measured across the 1k?
View ArticleForum Post: RE: PCM5101A/PCM5102A Difference Between PCM5101A and PCM5102A
Hi Don-san,Thank you for your reply quickly.We understood it, will inform it to our customers.Best Regards,Kato
View ArticleForum Post: RE: DAC38J84 Quad-Channel, 16-Bit, 1.6/2.5 GSPS, DAC with...
Hi Paul,Not considering performance, the only limitation is the sampling rate and the interpolation filters. The maximum output frequency will be limited to about 0.4 * Fs, so at 2.5 GSPS the limit is...
View ArticleForum Post: RE: LDC1000 Max sensing distance VS Coil design and accuracy of data
Hello,Apologies for our belated reply.Sensing distance, indeed, scales with the coil diameter.Distinguishing one tiny component from others (or nearby metals), however, will be very challenging.
View ArticleForum Post: RE: Measurement of Rp
Hello,I assume that the probe has a cap of 10pF, which is comparable to the cap in LC. Probing will detune the tank, and moves it out of the resonance, thus the Rp value, calculated with this method is...
View ArticleForum Post: FPGA code in LM97600RB modifications for custom board
Hi,We are currently using the LM97600RB Eval board in order to use the LM97600 ADC. However, we wish to move away from this board to our own board which uses the LM97600 and the Virtex-5 FPGA. But we...
View ArticleForum Post: RE: Using ADS1248 or LMP90080 for 2-wire PT-1000 RTD - suggestions?
Please see the response here:http://e2e.ti.com/support/data_converters/precision_data_converters/f/73/p/318269/1107244.aspx#1107244
View ArticleForum Post: RE: Noise issue in a voltage measurement APP with the ADS1247
Hi Jason,Take a look at the ADS1255 (or if you need more than one input the ADS1256).Best regards,Bob B
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Forum Post: No signal from the DOUT pin in ADS1299 EEG-FE
I am trying to read data from DOUT pin in the ADS1299 EEG-FE without the MMB0 board. I have sent a SCLK clock (bottom of the figure) of 8 bits *27 using a 8-bit MCU. The default read data mode of the...
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Forum Post: RE: ADS1248 SCHEMATIC FOR 2-WIRE PT1000 RTD
Hi Paolo,I think you should re-read my previous post as it appears you have missed the point I was trying to make. As I said before, you can use your schematic design and the IDAC current source...
View ArticleForum Post: RE: TLV320AIC3120 Difference Between Synchronized miniDSP and...
We have one miniDSP for the ADC and one for the DAC to allow simultaneous processing of the playback and record path.
View ArticleForum Post: RE: AICx3100 - Beep Generation
Instead of copying the I2C traffic, I suggest using the configuration data from AIC3100_USB_Init.txt which is in the codec folder that belongs to the CodecControl GUI (available from the EVM product...
View ArticleForum Post: RE: Why 32-bit DAC?
It is primarily a formatting convenience for folks doing processing in 32 bit registers.
View ArticleForum Post: RE: Official Software / Firmware Thread (GUI, MSP430, MATLAB,...
Yes, the demo is not that straight forward to follow. So far no success in getting any data in LabView. I am not new to Labview, but the demo is not user friendly by any measure.Thanks for you help, i...
View ArticleForum Post: RE: Linear indutive transducer
Thanks for your answer.In your message, I have a question with "access the EVM using a custom-script for 24-bit data". I don´t understand. Thank you!
View ArticleForum Post: RE: ADS131E08 sampling at 2400 SPS
You would need to provide an external clock that achieves the desired sample rate of 2.4kSPS.Table 4 and Configuration Register 1 in the datasheet shows the relationship between fclk, fmod, and the...
View ArticleForum Post: RE: ADS1259EVM-PDK Protocol
Luis -The EVM is sold as part of the -PDK and not separately. For warehouse inventory/stocking purposes, this was how it was decided to do business.
View ArticleForum Post: RE: DAC34SH84EVM Xilinx FPGA project
Hi, We currently do not have project files for the interface between KC705 and DAC34SH84. The closest support document that we have is the following:http://www.ti.com/lit/pdf/slaa545-Kang
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