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Forum Post: RE: ADS131E08 sampling at 2400 SPS

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You would need to provide an external clock that achieves the desired sample rate of 2.4kSPS.

Table 4 and Configuration Register 1 in the datasheet shows the relationship between fclk, fmod, and the datarate.  As long as the input frequency is between the spec limits shown on page 4, the part will behave as expected.


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