Hello Anas, Welcome to the TI E2E community. The filter will have a 5 conversion period settling time, but each conversion will show a response to a step input change. Also, using the LL filter with OSR=32, you should see approximately 65uVpp of noise. Your reading values are stable to better than 1uV above, which suggests that the readings from the ADC are not converted to the correct values, or only 16b of the 24b word is captured. Please capture a few SPI frames using a logic analyzer or scope and send a copy so I can see the raw output of the ADC. Please include /CS, /DRDY, SCLK, and DOUT. Also, please confirm the reference voltage used, and the voltage waveform applied to the input. Regards, Keith Nicholas Precision ADC Applications
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