Hi Donald,
The AVDD supply is the analog supply for the chip and the DRVDD is the digital supply. The analog supply is the critical supply for noise performance and should be separate from the digital supply for best results. Since the digital supplies shouldn't effect the analog performance so you could likely use a single LDO to cover DRVDD for all three chips (assuming current requirements are met). It is possible that you could use a single LDO for the AVDD supplies for all three chips as well. If you need good isolation between chips, three separate LDOs may be safer.
To estimate the effect of voltage ripple on ENOB, you would need to measure the PSRR of the part for the frequencies of interest. Based on the measured voltage ripple (powers of the harmonics), you can then estimate the spur level at the ADC output due to the power supply ripple.
Regards,
Matt Guibord