Hey Richard ,
How are you ? Hope you are doing well...Here I discussed with my project guide ..he told speed 3MSPS is ok which he means I can't select A/D converter less than 3msps it is a margin ... So i decided to go with 15 msps Ads5281 so here my data rate would be 12 times 15 that equals to 180 mbps ... output will be in Lvds signalling so I wanted to convert into single ended signals (Cmos /Lvttl) , high speed differential receiver SN65LVDS386 which accepts 200mbps which is ok for my requirement so here I wanted to discuss with u about skew problems ... output skew of high differential receiver is 400ps , setup and hold time of ads5281 at 15 msps is around 2.5ns and 2.8 ns ...do u think I gonna meet timing requirements in fpga? no viloation ? if we transmit the data in this way ....
help me Richard sir