Hi Jim, DAC84108 have single GND for all the power supplies and there is no need to have split grounding layout for this device. Please use the layout example provided in the DAC81408 data sheet, for your design. Data sheet - https://www.tij.co.jp/lit/ds/symlink/dac81408.pdf . (section: 12- Layout ). Thanks, Sanjay
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Forum Post: RE: DAC61408: Power Grounds
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Forum Post: RE: DAC81402: Reference design of Bipolar Output DAC81402
Hi, This is capable of proving +/-10V output and there is no reference design is needed as such. Please refer to the DAC81404EVM user's guide (DAC81402 is 2-ch variant) for details on how to use the DAC81402 in a design. www.ti.com/.../slau912a.pdf Thanks, Sanjay
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Forum Post: RE: ADS8689: 800Vdc measurement
Hi Tom, yes inserting a Buffer would be an option. I just wanted to shun the effort and expenses like adding an other isolated DCDC for the OPAmps negative rail. But if it's the only or easiest way to go, we will do it. Thanks! Best regards Ludwig
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Forum Post: RE: ADS131M04-Q1: Help Needed: Basic Communication Between ADS131M04 and RP2040
Below is the register write this is the register read The RESERVED parts in the response are also filled with 1s.
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Forum Post: ADC12DL3200: Clock Distribution Diagram
Part Number: ADC12DL3200 Other Parts Discussed in Thread: DAC12DL3200 , LMK04828 , LMX2582 Tool/software: Hello I am new user on ADC12DL3200. I want to have my custom board using 2x(4Ch)ADC12DL3200 and 1x(2Ch)DAC12DL3200. Also I want these channels all be synced together. For giving clock to these parts I can use LMK04828 directly (Attached Picture) right? Can you tell me if I want to use Synthesizer what should I do because Synthesizers like LMX2582 has just to output(RFoutA and RFoutB)but I have 3 devices needs clock. If you show me on diagram or send me any information or EVMs which used more than 1 analog IC, will be perfect. Thanks
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Forum Post: RE: AFE5818EVM: Can I use AFE5818EVM with TSW14J50?
Hi, AFE5818 EVM is not compatible with TSW14J50 . You can use AFE58JD18 EVM with TSW14J50 for evaluation . Difference between AFE5818 and AFE58JD18 are demodulation and JESD interface .
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Forum Post: RE: AFE58JD48EVM: Query regading the ADC sample MSB bit
Hi Sachin, The signal we are generating is independent from sysref and device clock, we are using JESD6600 as the square wave generator instead of generating it through FPGA.
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Forum Post: RE: ADS8689: help regarding flexible AFE 0-10V/4-20mA
Hi Lars, thank you for your detailed reply, I found this reference design TIDA-01333 ( www.ti.com/.../TIDA-01333 ) which I think should be more suitable for my application. I just have 2 questions: Firstly, is it possible to implement the open wire detection using only a 2Mohm resistor pulled up to 13V before the MUX? And secondly, I am not quite sure how the C44 100pF capacitor were chosen, as it was not mentioned in the design guide. Best regards, Jonas
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Forum Post: ADC3669EVM:Data corruption - ADC3669EVM
Part Number: ADC3669EVM Tool/software: Hello, I am experiencing an issue with the ADC3669EVM Devkit. Below, I will describe the problem. The ADC3669EVM kit is running on the Agilex 7 platform - AGIB027R31B1E1VB. The device is connected to FMC B, and the sampling clock is set to 400 MHz. The first issue I encountered is as follows: the device, purchased in December 2024, is labeled as REV. B on the silkscreen layer of the PCB. However, the documentation (schematics) available online corresponds to version C - REV. C. The documentation states that component R125 is not soldered. This pin, pulled to GND, detects whether the module is connected to the FMC. In REV. B, such a designation does not exist. By tracing the pin from the FMC, I discovered that it corresponds to R188. Let’s say this problem has been resolved. The next issue is more serious, namely data corruption on certain bits. I configured the ADC test pattern to RAMP. On the FPGA side, I collect data on the rising and falling edges, and I observe the following effect: some bits are shifted. The FPGA design is timing-consistent, so the issue likely isn't there. On the FPGA side, I tried shifting the CLK phase. The result was that the alignment improved for some bits but worsened for others. I also attempted applying delays to individual lines from the FPGA. While this partially improved the situation, it didn't fully resolve the issue. Could you assist with this problem?
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Forum Post: RE: ADS1259: ADC conversions returning duplicate values.
Maybe these are more readable?
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Forum Post: RE: ADS1292ECG-FE: Idle mode
P.S.: I also tried sending opcommands. See the pictures.
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Forum Post: RE: ADS131M08: WREG command
Hi Dale, I wrote 0x0E0E to the Gain register using the WREG command. However, when I read back the same register using the RREG command, I only receive 0x00 as its value. The ADC is still returning NULL for the channel measurements. I've also produced a new version of my PCB with additional measurement points. Please note that my next results may be slightly delayed
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Forum Post: ADS1298: Cannot get ID
Part Number: ADS1298 Tool/software: Hi all, I am trying to work with an ADS1298 board I inherited by first trying to read the ID of the board before trying to read ECG data. Since it's an ADS1298, I'm expecting the message 0x92, but I am not reading any data on the DOUT line (MISO). I checked the FAQ section for this chip and nothing really helped. I followed the power up sequence guide and VCAP1 seems to be above 1.1V at around 1.3V, so something must go wrong after this step. I am using a NUCLEO STM32F767ZI for communicating with the ADS chip. In the screenshot below you can see the two functions I used to power up the chip and initialize it for reading the ID. The first one is running only once, and the second one is running continuously. void ADS1298_Init ( SPI_HandleTypeDef * hspi ) { uint8_t wakeupCmd = 0x02 ; // Wakeup command uint8_t rregCmd = 0x11 ; // SDATAC mode command for sending data uint8_t resetCmd = 0x06 ; // Reset command HAL_GPIO_WritePin ( GPIOA , GPIO_PIN_4 , GPIO_PIN_RESET ) ; //PA4 is custom set as SPI1_CS - set now LOW because of the transaction start HAL_GPIO_WritePin ( GPIOA , GPIO_PIN_5 , GPIO_PIN_RESET ) ; //START pin starts LOW - PA5 -- TRY THIS, according to the datasheet DRDY is supposed to toggle at tclk /8192 after this step? HAL_GPIO_WritePin ( GPIOA , GPIO_PIN_6 , GPIO_PIN_SET ) ; // The default state of the PWDN pin is high - set HIGH HAL_GPIO_WritePin ( GPIOA , GPIO_PIN_3 , GPIO_PIN_SET ) ; // The default state of the RESET pin is high - set HIGH HAL_Delay ( 100 ) ; HAL_GPIO_WritePin ( GPIOA , GPIO_PIN_3 , GPIO_PIN_RESET ) ; // RESET set LOW HAL_Delay ( 100 ) ; HAL_GPIO_WritePin ( GPIOA , GPIO_PIN_3 , GPIO_PIN_SET ) ; // RESET set HIGH HAL_Delay ( 100 ) ; //The last 3 blocks of code changing RESET make up the power-up sequence HAL_SPI_Transmit ( & hspi1 , & wakeupCmd , 1 , HAL_MAX_DELAY ) ; //Wake up from standby mode HAL_Delay ( 1 ) ; transferSPI ( resetCmd ) ; // Reset command //HAL_SPI_TransmitReceive(&hspi1, &resetCmd, 1, HAL_MAX_DELAY); // Send the RESET command -- OR THIS, how I did the line above before HAL_GPIO_WritePin ( GPIOA , GPIO_PIN_4 , GPIO_PIN_SET ) ; // Setting CS high again HAL_Delay ( 500 ) ; HAL_GPIO_WritePin ( GPIOA , GPIO_PIN_4 , GPIO_PIN_RESET ) ; transferSPI ( rregCmd ) ; // SDATAC command, stop reading data so the ADS1298 can receive commands HAL_GPIO_WritePin ( GPIOA , GPIO_PIN_4 , GPIO_PIN_SET ) ; HAL_Delay ( 500 ) ; } void ADS1298_SendID ( SPI_HandleTypeDef * hspi ) { uint8_t command [ 2 ] ; //Buffer for sending commands to the ADS1298 uint8_t rregCmd = 0x11 ; // SDATAC mode command for sending data HAL_GPIO_WritePin ( GPIOA , GPIO_PIN_4 , GPIO_PIN_RESET ) ; transferSPI ( rregCmd ) ; // SDATAC command, stop reading data so the ADS1298 can receive commands command [ 0 ] = 0x20 | 0x00 ; // RREG opcode command reads register data from the 0x00 address (ID register) command [ 1 ] = 0x00 ; // Number of registers to read - 1 (only 1 register) HAL_SPI_Transmit ( & hspi1 , command , sizeof ( command ) , HAL_MAX_DELAY ) ; // Send the RREG command //transferSPI(command); // OR THIS - but it doesn't seem like it is working //HAL_Delay(1); HAL_SPI_Receive ( & hspi1 , response , sizeof ( response ) , HAL_MAX_DELAY ) ; // Read the ID register value //HAL_Delay(1); // Pull CS high to deselect the ADS1298 HAL_GPIO_WritePin ( GPIOA , GPIO_PIN_4 , GPIO_PIN_SET ) ; } These are the SPI settings: static void MX_SPI1_Init ( void ) { /* USER CODE BEGIN SPI1_ Init 0 */ /* USER CODE END SPI1_ Init 0 */ /* USER CODE BEGIN SPI1_ Init 1 */ /* USER CODE END SPI1_ Init 1 */ /* SPI1 parameter configuration*/ hspi1 . Instance = SPI1 ; hspi1 . Init . Mode = SPI_MODE_MASTER ; hspi1 . Init . Direction = SPI_DIRECTION_2LINES ; hspi1 . Init . DataSize = SPI_DATASIZE_8BIT ; hspi1 . Init . CLKPolarity = SPI_POLARITY_LOW ; hspi1 . Init . CLKPhase = SPI_PHASE_2EDGE ; hspi1 . Init . NSS = SPI_NSS_SOFT ; hspi1 . Init . BaudRatePrescaler = SPI_BAUDRATEPRESCALER_32 ; hspi1 . Init . FirstBit = SPI_FIRSTBIT_MSB ; hspi1 . Init . TIMode = SPI_TIMODE_DISABLE ; hspi1 . Init . CRCCalculation = SPI_CRCCALCULATION_DISABLE ; hspi1 . Init . CRCPolynomial = 7 ; hspi1 . Init . CRCLength = SPI_CRC_LENGTH_DATASIZE ; hspi1 . Init . NSSPMode = SPI_NSS_PULSE_DISABLE ; if ( HAL_SPI_Init ( & hspi1 ) != HAL_OK ) { Error_Handler () ; } /* USER CODE BEGIN SPI1_ Init 2 */ /* USER CODE END SPI1_ Init 2 */ } Some relevant info that cannot be seen in the screenshot I took on the oscilloscope: the DRDY pin is stuck high. I am using a custom GPIO pin for CS, will report back later if I'm facing the same issue with the NSS pin for SPI1. I have also seen some people setting up the DRDY pin as an interrupt, will also do that and report later, but I doubt this is the main problem since I am not reading anything on the MISO line. Below you can see a screenshot from the oscilloscope of the SPI communication. From top to bottom, the lines are MISO, MOSI, CLK and CS. Any help would be greatly appreciated!
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Forum Post: RE: ADS8689: 800Vdc measurement
Is it possible to shut off the internal Biasing Voltage? In my tests with a buffer, it seems, that the voltage measurement is still wrong.
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Forum Post: RE: ADS1118EVM: TI Web GUI Data Capture Not drawing line between points, data is seemingly invisible.
There is indeed data after exporting, I'll try it on a windows computer.
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Forum Post: RE: ADS1255: Example 2-wire configuration with UART in serial mode 0
Hi Giovanni Vitale, Can you provide logic analyzer data showing the communication to and from the ADC? Please provide both signals (RX and TX) Please also share a schematic -Bryan
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Forum Post: ADS8355: Ads8355
Part Number: ADS8355 Tool/software: Hi, We need sample program or programming guidelines for ADS8355 Using C2000 microcontrollers
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Forum Post: RE: ADC08351: Inquiry about ADC08351 conversion clock
Hi Lee, The min sampling clock spec is 2MSPS for this device. However, the performance will look very poor. This is the reason it is not shown in the typ performance plots. Regards, Rob
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Forum Post: AMC131M03: AMC131M03
Part Number: AMC131M03 Tool/software: I am trying to drive an AMC131M03 on an AMC131EVM card from a F28379D ControlCard. The Precision Host Interface has been removed. The F28379D ControlCard is connected via the J5 DEBUG terminals. All the jumpers are in their default positions. To check the configuration of the AMC131M03, I am trying to read the STATUS register. The main program and routines are listed here: //############################################################################# // // FILE: spi_ex3_external_loopback_fifo_interrupt.c // // TITLE: SPI Digital Loopback with FIFO Interrupts // //! \addtogroup driver_example_list //! SPI Digital External Loopback with FIFO Interrupts //! //! This program uses the external loopback between two SPI modules. Both //! the SPI FIFOs and their interrupts are used. SPIA is configured as a slave //! and receives data from SPI B which is configured as a master. //! //! A stream of data is sent and then compared to the received stream. //! The sent data looks like this: \n //! 0000 0001 \n //! 0001 0002 \n //! 0002 0003 \n //! .... \n //! FFFE FFFF \n //! FFFF 0000 \n //! etc.. \n //! This pattern is repeated forever. //! //! \b External \b Connections \n //! -GPIO25 and GPIO17 - SPISOMI //! -GPIO24 and GPIO16 - SPISIMO //! -GPIO27 and GPIO19 - SPISTE //! -GPIO26 and GPIO18 - SPICLK //! //! \b Watch \b Variables \n //! - \b sData - Data to send //! - \b rData - Received data //! - \b rDataPoint - Used to keep track of the last position in the receive //! stream for error checking //! // //############################################################################# // // // $Copyright: // Copyright (C) 2013-2024 Texas Instruments Incorporated - http://www.ti.com/ // // Redistribution and use in source and binary forms, with or without // modification, are permitted provided that the following conditions // are met: // // Redistributions of source code must retain the above copyright // notice, this list of conditions and the following disclaimer. // // Redistributions in binary form must reproduce the above copyright // notice, this list of conditions and the following disclaimer in the // documentation and/or other materials provided with the // distribution. // // Neither the name of Texas Instruments Incorporated nor the names of // its contributors may be used to endorse or promote products derived // from this software without specific prior written permission. // // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. // $ //############################################################################# // // Included Files // #include "driverlib.h" #include "device.h" //#include "ads124s08.h" #include "amc131m03.h" #include #include "crc_calculations.h" // // Globals // volatile uint16_t sData[20]; // Send data buffer volatile int32_t rData[20]; // Receive data buffer volatile uint16_t rRegData[20]; // Receive buffer for registers volatile float rValue[5]; // Receive data buffer Converted values volatile uint16_t rDataPoint = 0; // To keep track of where we are in the // data stream to check received data volatile uint16_t rDataPoint1 = 0; volatile uint16_t tDataPoint = 0; volatile static uint16_t DataTxCount = 0; volatile uint16_t dummyData = 0; volatile uint16_t rxData16 = 0; volatile uint16_t rxDelay = 0; volatile uint16_t temp16 = 0; volatile uint16_t txData16 = 0; volatile uint16_t txDelay = 0; volatile uint32_t DataReady = 0; volatile uint32_t DRDY_State = 1; volatile uint32_t DRDY_StateZ = 0; #define START_pin 74 #define DRDY_pin 75 #define RESET_pin 76 #define CS_pin 77 #define LOW 0 #define HIGH 1 #define max(a,b) ((a>b)*a+(b>a)*b) #define twoscomp(x) ((!x)+1) #define invtwoscomp(x) (!(x-1)) #define twoToThe24 16777216 volatile float fclk_ADS114 = 4096000U; volatile float tclk_ADS114 = 1.0 / 4.096e06; volatile _Bool TxBool = 0; volatile _Bool RxBool = 0; volatile _Bool Manual = 1; static volatile int ManStep = -1; static int RegToRead; static int ValToWrite; volatile long double delay_Count_LF; volatile uint32_t delay_Count; volatile uint16_t STATUS; volatile uint16_t Lock; volatile uint16_t F_Resync; volatile uint16_t Reg_Map; volatile uint16_t CRC_Err; volatile uint16_t CRC_Type; volatile uint16_t Reset; volatile uint16_t Wlength; volatile uint16_t Fuse_Fail; volatile uint16_t SEC_Fail; volatile uint16_t DRDY2; volatile uint16_t DRDY1; volatile uint16_t DRDY0; /*! @brief AMC CRC initial value */ #define AMC_CRC_INITAL_VALUE (0xFFFF) /*! @enum AMC_CRC_TYPE */ typedef enum { /*! @brief AMC CRC type CCITT */ AMC_CRC_TYPE_CCITT = 0, /*! @brief AMC CRC type ANSI */ AMC_CRC_TYPE_ANSI } AMC_CRC_TYPE; /*! @enum AMC_CRC */ typedef enum { /*! @brief AMC CRC disable */ AMC_CRC_DISABLE = 0, /*! @brief AMC CRC enable */ AMC_CRC_ENABLE } AMC_CRC; /*! @brief AMC register word length 16 bit */ #define AMC_REG_WORD_LENGTH_16BIT (2) /*! @brief AMC register word length 24 bit */ #define AMC_REG_WORD_LENGTH_24BIT (3) /*! @brief AMC register word length 32 bit sign extended */ #define AMC_REG_WORD_LENGTH_32BIT_SIGN_EXTEND (4) /*! @brief AMC register word length 16 bit zero padded */ #define AMC_REG_WORD_LENGTH_32BIT_ZERO_PADDED (4) /*! @brief AMC command word length */ #define AMC_CMDLENGTH (1) /*! @brief AMC CRC word length */ #define AMC_CRCLENGTH (1) /*! @brief AMC data word length */ #define AMC_WORDLENGTH AMC_REG_WORD_LENGTH_16BIT #define DEVICE_DELAY_nS(delay_nS) SysCtl_delay((uint32_t)(((((long double)(delay_nS)) / (1000000000.0L / (long double)DEVICE_SYSCLK_FREQ)) - 9.0L) / 5.0L)) // // Function Prototypes // void initSPICMaster(void); // void initSPIASlave(void); void configGPIOs(void); //__interrupt void spicTxFIFOISR(void); __interrupt void spicRxFIFOISR(void); void setup_AMC131(void); void Send_Sdata(int n, volatile uint16_t sData[5]); void WriteRegister(int RegNum, int RegVal); void WriteOpCode(int OpCode); void ReadRegister(int RegNum, int NumRegs, volatile uint16_t *rRegData); void ReadData(int n, volatile uint16_t *rRegData); uint16_t AMC_calculateCRC(AMC_CRC_TYPE crcType, volatile uint16_t dataBytes[], uint8_t numberBytes); // // Main // void main(void) { uint16_t i,j; // // Initialize device clock and peripherals // Device_init(); // // Disable pin locks and enable internal pullups. // Device_initGPIO(); // // Initialize PIE and clear PIE registers. Disables CPU interrupts. // Interrupt_initModule(); // // Initialize the PIE vector table with pointers to the shell Interrupt // Service Routines (ISR). // Interrupt_initVectorTable(); // // Interrupts that are used in this example are re-mapped to ISR functions // found within this file. // // Interrupt_register(INT_SPIC_TX, &spicTxFIFOISR); // Interrupt_register(INT_SPIC_RX, &spicRxFIFOISR); // Upper PIE group 6 Interrupt_register(GPIO_INT_XINT1, &spicRxFIFOISR); // Lower PIE group 1 //Interrupt_enable(INT_XINT1); //EINT; GPIO_setInterruptPin(DRDY_pin, GPIO_INT_XINT1); // Falling edge interrupt GPIO_setInterruptType(GPIO_INT_XINT1, GPIO_INT_TYPE_FALLING_EDGE); GPIO_enableInterrupt(GPIO_INT_XINT1); // Enable XINT1 // // Configure GPIOs for external loopback. // configGPIOs(); // // Set up SPI C as master, initializing it for FIFO mode // initSPICMaster(); // // Enable interrupts required for this example // // Interrupt_enable(INT_SPIC_TX); // Interrupt_enable(INT_SPIC_RX); Interrupt_enable(GPIO_INT_XINT1); // // Enable Global Interrupt (INTM) and realtime interrupt (DBGM) // EINT; ERTM; // // Initialize the data buffers // sData[0] = ((unsigned char) AMC131_OPCODE_RREG); sData[0] = sData[0] = 0) && (RegToRead = 0) && (RegToRead 0) { /* Check MSB's of data and crc */ dataMSb = (bool) (dataBytes[byteIndex] & bitIndex); crcMSb = (bool) (crc & 0x8000u); /* Left shift CRC register */ crc >= 1; } } return (crc); } // ############################################################ // // End of File // The include file is here: // From: AMC131M03 SBAS994B // Address Acronym Reset Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 #define ID_AMC131_ADDR 0x00 #define ID_AMC131_DEFAULT Xb // READ ONLY RESERVED[15-12]=0100b CHANCNT[3:0][11-8]=0011b // RESERVED[7-0] #define STATUS_AMC131_ADDR 0x01 #define STATUS_AMC131_DEFAULT 0x0540 // READ ONLY LOCK F_RESYNC REG_MAP CRC_ERR CRC_TYPE RESET WLENGTH[1:0] // FUSE_FAIL SEC_FAIL RESERVED[5-3] DRDY2 DRDY1 DRDY0 #define MODE_AMC131_ADDR 0x02 //#define MODE_AMC131_DEFAULT 0x0510 #define MODE_AMC131_DEFAULT 0x0000 // RESERVED[15-14] REG_CRC_EN RX_CRC_EN CRC_TYPE RESET WLENGTH[1:0] // RESERVED[7-5] TIMEOUT DRDY_SEL[1:0][3-2] DRDY_HiZ DRDY_FMT #define CLOCK_AMC131_ADDR 0x03 //#define CLOCK_AMC131_DEFAULT 0x070E #define CLOCK_AMC131_DEFAULT 0x0722 // RESERVED[15-11], CH2_EN, CH1_EN, CH0_EN, = 0x07 << 8 enables 2,1,0 // CLK_DIV[1:0], TURBO, OSR[2:0], PWR[1:0] = 0x0E = 14 = 2 + 4 + 8 = #define GAIN_AMC131_ADDR 0x04 #define GAIN_AMC131_DEFAULT 0x0000 // RESERVED[15-11] PGAGAIN2[2:0][10-8] // RESERVED[7] PGAGAIN1[2:0][6-4] RESERVED[3] PGAGAIN0[2:0] #define CFG_AMC131_ADDR 0x06 #define CFG_AMC131_DEFAULT 0x0600 // RESERVED GPO_EN GPO_DAT GC_DLY[3:0] GC_EN // RESERVED #define CH0_CFG_AMC131_ADDR 0x09 #define CH0_CFG_AMC131_DEFAULT 0x0000 // PHASE0[9:2][15-8] // PHASE0[1-0][07-6] RESERVED[5-2] MUX0[1:0] #define CH0_OCAL_MSB_AMC131_ADDR 0x0A #define CH0_OCAL_MSB_AMC131_DEFAULT 0x0000 // OCAL0_MSB[15:8] // OCAL0_MSB[7:0] #define CH0_OCAL_LSB_AMC131_ADDR 0x0B #define CH0_OCAL_LSB_AMC131_DEFAULT 0x0000 // OCAL0_LSB[7:0] // RESERVED[7-0] #define CH0_GCAL_MSB_AMC131_ADDR 0x0C #define CH0_GCAL_MSB_AMC131_DEFAULT 0x8000 // GCAL0_MSB[15:8] // GCAL0_MSB[7:0] // See Table 8-7. GCLn[23:0] Bit Mapping 800000h == Gain of 1 #define CH0_GCAL_LSB_AMC131_ADDR 0x0D #define CH0_GCAL_LSB_AMC131_DEFAULT 0x0000 // GCAL0_LSB[7:0] // RESERVED #define CH1_CFG_AMC131_ADDR 0x0E #define CH1_CFG_AMC131_DEFAULT 0x0000 // PHASE1[9:3][15-8] // PHASE1[1:0][7-6] RESERVED[5-2] MUX1[1:0] #define CH1_OCAL_MSB_AMC131_ADDR 0x0F #define CH1_OCAL_MSB_AMC131_DEFAULT 0x0000 // OCAL1_MSB[15:0] // OCAL1_MSB[15:0] #define CH1_OCAL_LSB_AMC131_ADDR 0x10 #define CH1_OCAL_LSB_AMC131_DEFAULT 0x0000 // OCAL1_LSB[7:0] // RESERVED #define CH1_GCAL_MSB_AMC131_ADDR 0x11 #define CH1_GCAL_MSB_AMC131_DEFAULT 0x8000 // GCAL1_MSB[15:0] // GCAL1_MSB[15:0] // See Table 8-7. GCLn[23:0] Bit Mapping 800000h == Gain of 1 #define CH1_GCAL_LSB_AMC131_ADDR 0x12 #define CH1_GCAL_LSB_AMC131_DEFAULT 0x0000 // GCAL1_LSB[7:0] // RESERVED #define CH2_CFG_AMC131_ADDR 0x13 #define CH2_CFG_AMC131_DEFAULT 0x0000 // PHASE2[9:0] // PHASE2[9:0] TS_SEL TS_EN RESERVED TS_CHOP MUX2[1:0] #define CH2_OCAL_MSB_AMC131_ADDR 0x14 #define CH2_OCAL_MSB_AMC131_DEFAULT 0x0000 // OCAL2_MSB[15:0] // OCAL2_MSB[15:0] #define CH2_OCAL_LSB_AMC131_ADDR 0x15 #define CH2_OCAL_LSB_AMC131_DEFAULT 0x0000 // OCAL2_LSB[7:0] // RESERVED #define CH2_GCAL_MSB_AMC131_ADDR 0x16 #define CH2_GCAL_MSB_AMC131_DEFAULT 0x8000 // GCAL2_MSB[15:0] // GCAL2_MSB[15:0] // See Table 8-7. GCLn[23:0] Bit Mapping 800000h == Gain of 1 #define CH2_GCAL_LSB_AMC131_ADDR 0x17 #define CH2_GCAL_LSB_AMC131_DEFAULT 0x0000 // GCAL2_LSB[7:0] // RESERVED #define DCDC_CTRL_AMC131_ADDR 0x31 #define DCDC_CTRL_AMC131_DEFAULT 0x0000 // RESERVED DCDC_FREQ[3:0] // RESERVED DCDC_EN #define REGMAP_CRC_AMC131_ADDR 0x3E #define REGMAP_CRC_AMC131_DEFAULT 0x0000 // REG_CRC[15:0] // REG_CRC[15:0] // COMMAND DESCRIPTION COMMAND WORD RESPONSE #define AMC131_OPCODE_NULL 0x0000 // No operation 0000 0000 0000 0000 STATUS register #define AMC131_OPCODE_RESET 0x0011 // Reset the device 0000 0000 0001 0001 1111 1111 0010 0011 #define AMC131_OPCODE_STANDBY 0x0022 // Place the device into standby mode // 0000 0000 0010 0010 0000 0000 0010 0010 #define AMC131_OPCODE_WAKEUP 0x0033 // Wake the device from standby mode to conversion mode // 0000 0000 0011 0011 0000 0000 0011 0011 #define AMC131_OPCODE_LOCK 0x0555 // Lock the interface such that only the NULL, UNLOCK, and RREG commands are valid // 0000 0101 0101 0101 0000 0101 0101 0101 #define AMC131_OPCODE_UNLOCK 0x0655 // Unlock the interface after the interface is locked // 0000 0110 0101 0101 0000 0110 0101 0101 #define AMC131_OPCODE_RREG (0x05 << 13) // Read nnn nnnn plus 1 registers beginning at address a aaaa a // 101a aaaa annn nnnn dddd dddd dddd dddd or 111a aaa annn nnnn (1) #define AMC131_OPCODE_WREG (int)(0x03 << 13) // Write nnn nnnn plus 1 registers beginning at address a aaaa a // 011a aaaa annn nnnn 010a aaaa ammm mmmm uint16_t WriteReg(int NumReg, int ADDR, uint16_t ValuesToWrite[10]) { return(NumReg + (ADDR << 7) + AMC131_OPCODE_WREG); } When I send a command to Read Register 1 the response on the PicoScope is here: I've tried this with the lo and hi bytes swapped and without CRCs. I can't see what I'm doing wrong. Can you help?
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Forum Post: RE: ADC12QJ1600EVM: FT_DEVICE_NOT_FOUND
Hi Manthan, Sorry to ask some of the obvious questions, do you have DC power connected tot he EVM when opening the GUI? Have any other modifications, jumpers moved, etc been applied to the EVM? Thx, Rob
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