Hi Chase, Thanks for your quick reply. In our design, we use CONTINUOUS SYSREF until the ADC is set up. Once the ADC is set up, MASK CLKDIV SYSREF is set to change from CONTINUOUS SYSREF to normal SYNC. During this time the FPGA is in reset. (For more information on the settings, see the attachment to the first question). This is because we want to start the link at any timing in the FPGA, not at the timing caused by the frequency divider in the PLL. I also want to ensure that when I reboot the system, if I input SYSREF at the same timing, the converted data will be output at the same phase (although there may be a blip of a few clocks). Is this possible? Thanks, Seiya
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Forum Post: RE: ADC32RF45: JESD204B link error when SYSREF is input
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Forum Post: RE: ADS131M04: Can it be set to 64kSPS?
Hi Dale-san Thank you for your reply. Is there any documentation that clearly states that Turbo feature was supported in the silicon from early 2023?
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Forum Post: RE: AFE4960EVM: Support for software files and userguide
Hello Chaitanya, Thank you for your post. On ti.com, sign into your myTI account and check your Secure Resources folder. There, you will find all necessary software installers and documentation for the EVM. Regards, Ryan
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Forum Post: RE: AFE1594EVM: ECG waveforms did not occur properly.
Hi Nandy, Thank you for your post. Let's discuss this issue offline. I will reach out to you via email. Regards, Ryan
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Forum Post: RE: ADS131M04: Can it be set to 64kSPS?
Hi takamatsu-san, Unfortunately, no. Thanks for your understanding. Regards, Dale
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Forum Post: RE: ADS1298ECGFE-PDK: Schematics of the MMB0 EVM
Hello Sneha, The MMB0 schematic is located on our E2E BIOFAQ page . I'm posting a direct link here: https://e2e.ti.com/support/data-converters-group/data-converters/f/data-converters-forum/775258/faq-what-documentation-is-available-for-the-mmb0/2868385#2868385 Regards, Ryan
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Forum Post: RE: ADS1298R: ADS1298R VCM
Hi Jejomar, I worry that measuring all electrodes individually with respect to an externally generated VCM will degrade the system CMR. In post processing, computing the differential lead (i.e. LA - RA) should theoretically cancel VCM from the result, but it's also possible the additional circuitry could lead to an increase in unwanted mismatch, causing common-mode to differential signal conversion. If you have faith in this system architecture based on previous experience, then the approach at least flexible enough for you to optimize the right configuration. Perhaps you could add one option to allow the RLD output to be used as your VCM input as well, such that the signal driven to the body is exactly the same signal against which each electrode is measured. Would that make sense to try? Regards, Ryan
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Forum Post: RE: AFE4490: Design consideration
Hi Syed, Pin 11 should only have 0.1µF Pin 17-18 (shorted) should have 1µF VCM_AFE should have a 1kΩ||10nF LPF (see layout example in datasheet for placement and shield routing) Regards, Ryan
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Forum Post: RE: ADS8588S: Output Data overflow error
0.01v input 2.49V input 2.51V input 4.99V input Please help analysis. thanks.
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Forum Post: ADS7028: RMS-DC converter
Part Number: ADS7028 Tool/software: Hi All, I am looking for an RMS-DC converter. Are there any TI products you would recommend? I am looking for something similar to AD8436. Best Regards, Ishiwata
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Forum Post: ADS1014L: Battery Load Sensing +/- 1000 amp, 0.05 mohm shunt , Please Suggest a part number
Part Number: ADS1014L Tool/software: Hi, Developing a Battery low side load sensing product. +/- 1000 amp, 0.05 milli ohm shunt. +/- 0.4% is the overall accuracy requirement of the system. Shunt accuracy is +/- 0.2%. Is ADS1014L, the right part ? if not please suggest right part Requirements are in the attached image. Thanks, Anil
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Forum Post: RE: ADS8668: About ADS8668 input pin rating rang
Hi Tom, Thanks for your explain about my question. Could you help check schematic why customer feedback 36 pin easy to damage? Need to add some ESD or something? thanks
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Forum Post: RE: AFE4490: Design consideration
Hello, Thanks for the response. I have changed the decoupling capacitors (PFA images). However, I don't understand point 3. Do I need to connect the 1K
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Forum Post: RE: ADS1120: Interfacing with STM32
I am using 3 wire RTD for my application.
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Forum Post: ADS1298ECGFE-PDK: ADS12916R
Part Number: ADS1298ECGFE-PDK Tool/software: Hello Forum members, This is my first question here sorry if I made any mistakes I'm trying to get 12- Lead ECG from ADS1x98ECG FE interfacing with MMB0, I have installed ADS1298ECGFE - PDK SW and it's working fine but I'm facing issues with graphs Here are the images of outputs, Can anyone please go through this and correct me
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Forum Post: DAC81416: Inquiry about SYNC Mode Setting and Toggle Function Operation
Part Number: DAC81416 Tool/software: Dear TI Support, I am a user of the DAC81416, and while basic functions such as voltage output and range settings are working as expected, I am encountering some issues that require assistance. SYNC Mode Setting : When setting the SYNC mode, I enable the sync bits for channel 0 and channel 1 (bit 1 in the 06h register), and then turn on the DAC power. However, the voltage output does not work simultaneously based on the power-on trigger. When I read the value from the 06h register, the settings appear correct, with the bits for channels 0 and 1 properly set to 1. I have also set the LDAC bit to 1 in the trigger register. To troubleshoot, I also set the LDAC hardware pin to LOW after configuring the sync mode, but no voltage output occurs. The output only activates when I turn the power ON via the power-down register, and the channels are turned on separately. I would appreciate clarification on the expected behavior of the SYNC mode. According to the datasheet, it seems that after setting the power-down register and configuring the sync mode, the output should be triggered via the LDAC hardware pin. Can you explain why it is not working in my case? Toggle Operation Issue : I have been trying to perform a toggle operation with the following sequence: Range setting Power ON Voltage setting Deactivate toggle register Enable sync mode Set LDAC LOW Set LDAC HIGH Voltage setting Activate toggle register After this sequence, I attempt to control toggle pin 0, but no output is generated. I suspect that this issue may be related to the SYNC mode, but I am still verifying this. Any help would be greatly appreciated.
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Forum Post: RE: DAC161S997: HART Connection with AD5700-1
Hi Joseph, I tried some different values for C68 an it turns out that my original smd capacitor was'nt working. Don't ask me why but the value itself was no problem. I still changed it to 10 nF since I was recieving some false values and that helped. Can you explain the impact of C16? What value would you recommend? Thanks so much! This really helped.
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Forum Post: RE: ADS8681WEVM-PDK: What access is made to restricted areas of the system when starting the program with admin. rights?
Hi Chris, thank you for your quick reply. Installing the application worked fine before. When starting the application as a user in our company, I am again asked for administrator rights. The IT dept. gets a headache me requesting admin rights when running a program ... They now ask where exactly the application needs access, what for etc. Can you give me information on that? They might open the lock for those files or folders. The issue is stressed a few times on different GUI in TI forum. I found some comments by TI, that a new release came up solving it without any admin permissions needed when starting the application. Have a good day. Regards, Andreas
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Forum Post: RE: ADS1260: SPI DOUT not echoing
Hi, Thanks for your answer. Start pin is tied low as we intend to control this via SPI START command. Clkin is tied low as we intend to use internal oscillator. See attached schematic:
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Forum Post: ADS124S08: Buffer configuration
Part Number: ADS124S08 Tool/software: Hi Team, One question on description of reference buffer, buffer is recommended to be disabled when REFP at AVDD, I would like to figure out why we suggest this way connection, as without buffering, the reference input impedance is approximately 250 kΩ, which is much smaller than other ADCs, and risk in power consumption and stability, thanks for your help!
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