Part Number: ADC12D800RF Tool/software: I have been using this ADC12D800RFRB board for a few months i am working on partial discharge detection and measurements in high power apparatus using ultra high frequency (UHF) sensor. The UHF sensors are broadband antennas operating from 0.5 to 3 GHz frequency range and the PD signal's spectral content in UHF regime spans over 0.4 to 2 GHz. PD emissions are stochastic by nature and the emissions give out several bursts lasting for about 1 ns. I was unable to capture this signal with this ADC12D800RFRB i tried sending a continuous stream of pulses through a arbitrary waveform generator i could see the continuous signals being captured in wave vision 5 software but i was not able to see or capture burst signal i hope the buffer is full or can i program the board so that it would be useful for my application can anyone help me out
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Forum Post: ADC12D800RF: ADC12D800RF
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Forum Post: RE: ADC3660EVM: what is the interface and voltage on InternalDCLKIN_P
Hayashi-san, The outputs on the CDCE6214 can be configured as either LVDS or LP-HCSL. The LP-HCSL maximum VOH is 850mV and the maximum possible the LVDS VOH is 1.825V. This is well below the 2.1 abs max on the DCLKIN. Regards, Geoff
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Forum Post: AMC1210: is it possible to handle two resolvers with one chip
Part Number: AMC1210 Tool/software: We want to connect two similar resolvers to a single AMC1210 chip. The first resolver will be connected to FILTER MODULE 1 and 2 , and the second resolver to FILTER MODULE 3 and 4 . The carrier signal to the resolvers will be driven through an operational amplifier. Is it possible for the AMC1210 chip to correctly handle two resolvers? If yes, what are the correct steps to calibrate the Signal Generator (PCAL and SCS1–SCS0 bits of the Clock Divider Register) for two resolvers?
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Forum Post: RE: ADS7128: When reading a Continuous Block of Registers in ADS7182 IC, there is no explanation including CRC.
Yong, I'm a little unsure on what you mean by the range of CRC. Section 8.3.7 specifies the CRC polynomial this device utilizes is x^8 + x^2 + x + 1. Therefore, the CRC computation algorithm that is generated by your controller for data sent to the ADS7128 device must conform to this polynomial. Every 8-bits of data sent on the I2C bus receives its corresponding 8-bit CRC. Is there anything specific that you would need clarification with in this regard? For most of these fields, it's impossible for me to tell you what the specific CRC would be as I don't know the specific data that you would be sending. Here is a tool to help you determine the CRC value you should be expecting. https://dev.ti.com/gallery/view/PADC/PADC_Design_Calculator_Tool/ver/1.20.0/ There isn't a specific option for the ADS7128, but the ADS124S06 uses the same CRC polynomial, so you can use it. You should disable the status bit, and rather than a 24-bit hex data, you can input an 8-bit hex data. In the example below, the input CRC is 0x80 and has a corresponding CRC of 0x89. Regards, Joel
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Forum Post: RE: ADS7142: Autonomous Mode GUI Operation
Hi Vinny and Jason, Allow me some time to get my hands on this hardware so that I may test it with the GUI. Thanks! Regards, Joel
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Forum Post: ADS1232REF: Periodic error
Part Number: ADS1232REF Tool/software: Hi, We are currently testing with the ADS1232REF board using the provided PC software to record data. In place of load cells, we are using 4 fixed 1k resistors in our wheatstone bridge configuration. With the thought to get as close to a constant output as possible and see how much noise/gain levels will affect our system before the load cells are even in place. However, while recording we see periodic error that seems to occur roughly every 20 minutes. We are running off of a 9v battery but are also connected to a laptop to record. Below is a graph of our data that ran overnight. The board is running on analysis mode, slow speed, and a gain of 128 with no averaging. We have also tried shielding our board. Thoughts on what would cause this behavior?
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Forum Post: RE: TLV2548: TLV2548CPW
Hi Hong, Can you tell me what data you are expecting in and out of the ADC during this time? Is it the SDO data that is wrong during this time? Could I also see what the input to your ADC circuit looks like? Regards, Joel
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Forum Post: RE: ADS8568EVM-PDK: ADS8568EVM-PDK
Hello Ekam, We currently we don't have a .BRD file that we can share, at the time of design Gerber files were produced instead. The ADS8568 EVM User's Guide does include the schematic, BOM, and layout of the board that can be used as reference. Best regards, Yolanda
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Forum Post: ADS5294: Does my signal need to be stabililed before the aperture delay?
Part Number: ADS5294 Tool/software: Hi, I plan to use the ADS5294 to perform the acquisition of a high speed analog image sensor, and I need some help understanding the implication of the aperture delay specification. My sensor is outputing a new pixel analog value every 25 ns and I need to make one acqusition per pixel. I will therefore use a 40 MHz sampling frequency. The rising time of the analog pixel is typically 23ns. If I set the ADC clock phase so that its rising edge (beginning of the hold phase) is at 23 ns, the sampling switch will actually be fully open 4 ns later (aperture delay specification), which give me 23 + 4 = 27 ns. As you can see, this is too long, as the analog image sensor is already outputing its next pixel at 25 ns. So in order to avoid that, my idea is to change the ADC clock phase so that is rising edge is at 19ns, which means the sampling switch will be fully open at 23 ns. Can I do this and simply compensate the aperture delay by anticipating it, or is there another concern I should be aware of? If I anticipate it like I described above, the analog pixel will continue to rise while the sampling switch is opening ; can this cause an error? Which value will be sampled by the ADC? In a few words, does my analog signal need to be stabilized before the aperture delay phase begins? Best regards, Maxime Puech
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Forum Post: RE: ADS131M02: AVDD and DVDD Filtering/Impedance Matching
Hi Will, Welcome to the E2E forum. Please see the answers below. 1&2. There is no need to use a LC filter on the power supply as long as you use a noise and high PSRR LOD, like TPS7A4700 which is often used on our EVM boards. Only a capacitor for each power supply pin is recommended for the ADC, the capacitor should be placed close to the ADC, you can check the schematic in the ADS131M04EVM user guide . 3. No need to match the impedance, you can see 9.2.2.1 Voltage Measurement Front-End section in the ADS131M02 datasheet for the details and example how to select a resistor voltage divider. 4. No need to do that. you can see 9.2.2.2 Current Measurement Front-End section in the ADS131M02 datasheet for the details. You can also see the voltage and current measurement circuit in some reference designs: Cost-Effective, 3-Phase CT Electricity Meter Ref. Design Using Standalone ADC Two-Phase Rogowski Coil Based Electricity Meter Analog Front-End Circuit (Rev. A) Regards, Dale
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Forum Post: RE: ADS124S08: BOCS switched off while converting?
Hi Andres Luder, I tried this on my EVM: I connected a 488kohm resistor between analog inputs AIN8 and AIN9 Then, I turned on the BOCS set to 1uA. I measured a voltage of 0.488V across the input pins (using a DMM, not the ADC). Then, I disconnected the resistor while the BOCS were enabled, and the DMM immediately read 3.3V The inputs on the EVM look like the image below Can you try reducing the capacitance on the pin to see if the settling time decreases? It would also help to know if the voltage on the pins changes at all, or if the voltage is always 0 during the first test with no delay? Or does it approach 0, but just never get there? And how are you determining the voltage on the pins? Using a DMM to measure it directly, or using the ADC? -Bryan
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Forum Post: RE: ADS131M02: AVDD and DVDD Filtering/Impedance Matching
Hi Dale, Thanks for the speedy response, it is appreciated. But, for my own learning, let's say hypothetically the PSRR is not great and noise is getting onto the output of the LDO. Can you then explain 1&2? for 3&4 the reason you don't need to is because the charged cap parallel to the pin is holding the sample, and is extremely close to the pin so the transmission length is tiny compared to the electrical wavelength? Can you explain " the common point being connected to GND instead of using one burden resistor for best THD performance. This split-burden resistor configuration ensures that the waveforms fed to the positive and negative terminals of the ADC are 180 degrees out-of-phase with each other". Why does having the split burden resistor ensure the positive and negative pins of the ADC are 180 deg out of phase?
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Forum Post: RE: TPL0501-100: Can we have a quarter-cycle sine taper digital pot?
Hi Don, I am not 100% I follow the design you are considering here - do you have a schematic snippet you can share? Is there a feature wish list you have for the TPL product family? We create these DPOTs for many industrial, medical, and personal electronic applications, so generally we keep them pretty simple to make them more universal. I was not able to find the exact images from the patents you describe. In regard to patents, I am affraid that is where I cannot help :) We are limited to customer support activities, as TI generally does not want to limit our customers or potential customers from using our devices. Our reference designs are open and we have a hope and desire that they are copied or leveraged as a starting point in design.
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Forum Post: RE: ADS124S08: BOCS switched off while converting?
Dear Bryan, thanks for your quick reply! In my case, the AIN values also go to VDD and VSS as long as I do not acquire with the ADC. It would be very interesting to know if you also get the 0.488V with the DMM even if you simultaneously acquire continuously (in a loop) with the ADC? As mentioned, in my case, the voltage drops as soon as I do that. The voltages actually do no "fall" to zero, but to values inside the valid measurement range so that I cannot detect a faulty (broken) sensor. Best regards Andres
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Forum Post: ADS8691: ECCN code with justification
Part Number: ADS8691 Tool/software: Looking for export control info, specifically ECCN code, for the following ADC ADS8691IPWR Thank you
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Forum Post: RE: ADS124S08: BOCS switched off while converting?
Hi Andres Luder, Below are the ADC readings using the same configuration. I manually disconnected the resistor, then added it back. You can see the voltage goes to full-scale (2.5V) from 0.5V, and then immediately drops back down to 0.5V when the resistor is reconnected So no, I am not seeing you what you are seeing Can you try something similar and send your results so I can review? -Bryan
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Forum Post: RE: TPL0501-100: Can we have a quarter-cycle sine taper digital pot?
Hi Paul, Thanks for responding. You can find good copies of the patents and application on patents.google.com, with images. I write them like engineering journal papers with plenty of images. I also have most of the granted patents at: Click Here . I hope that worked. If it didn't, go to tulsasoundguitars.com and click on "New page with U.S. Patents" under "Recent Posts". Try also: https://patents.google.com/patent/US20230013236A1/ . I wrote that three years ago, and recently rewrote a lot of it, with a replacement Specification and Claims, but you can get the idea. Here's one: and another: P1cos has a center-tap input. The plus signs on the guitar pickup coils (A, B, etc) show the same phase of exterior, interfering hum signal, which cancels in subtraction in the differential amplifier. It's possible to do this with mechanical pots or digital, but works better if the tapers are half-cycle (sine) or piecewise (cosine) sinusoids. A bit like the imperfect f(x) and g(x) in Fig. 19: RadErr is the difference from a polar vector length of 1. RotErr is the difference between x and the translated angle of an ideal polar vector on a half-circle. This is not my best algorithm, just an available Figure from the application. I don't use Pi or angle in my plots, having translated the curves to a pot taper space. If the digital pots are linear, I claimed a numerical algorithm that uses only range compare, add, subtract and multiply in the math processing unit to get sinusoids. No cosine, no sine, no square root or divide. So it could run on a T.I. MSP430 or 432 u-controller. For a blend-balance two gang pot, look at the curves for a Bourns Pro Audio PDB182-GTRB. Now imagine those crossing curves as two quarter-cycle sinusoids, which I think would keep the polar vector of the combined signals on a quarter-circle in 2-space. That's a nice general application, which I have just publicly disclosed and cannot now claim in a patent application. You're covered on that. And if you make them, I can incorporate them into the diagrams above. That is, if I ever get the resources. Does that help? Would T.I. like to make some advanced electric guitars? I have the patents to license.
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Forum Post: RE: DAC8742HEVM: Sending data via UART IN pin on DAC8742HEVM
Ibrahim, The UARTIN is still connected to an output from the USB2ANY, and there may be contention from the output of your terminal program to the output of the USB2ANY. Have you tried using an oscilloscope to check the UARTIN signal getting to the device? I would expect the contention between these outputs to cause signal disruptions, and your UART signal may not make it to the device. Joseph Wu
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Forum Post: RE: ADS1232REF: Periodic error
Hello Matt, Welcome to the TI E2E community. 20min cycle time seems like this might be temperature shift related to HVAC systems. Please confirm the 1k resistors that you used for the bridge emulation are low temperature drift. These should be low temperature coefficient (TC) resistors with a rating of 25ppm/C or better. Another test would be to use the external short option on the board, which can be enabled by placing shunts on J7 and J8 and re-running your tests. Regards, Keith Nicholas Precision ADC Applications
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Forum Post: RE: ADS8691: ECCN code with justification
Hi Mike, I'm seeing EAR99 as the ECCN code. To double check for your region, please send a note to: gtc_eccn-hts-naftateam@list.ti.com In your email, the ORDERABLE part number must be used - for example: ADS8691PWR instead of ADS8691
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