Part Number: ADS1014-Q1 Tool/software: Hello team, Customer met some problems when design ADS1014-Q1, there are some questions need to check with you: 1. What is the concrete range of half the sampling frequency of the ADC; 2. What is the meaning of Unwanted signal, what is the range? 3. What is the meaning and value of fmod/2? Thanks!
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Forum Post: ADS1014-Q1: Aliasing function
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Forum Post: RE: ADS112C04: Please help to check the setting for PT100 3-wire RTD
Hi Angel, I used RTD cacultaor to update the circuit. The adjusted usage parameters are as follows. Please help to check below setting for Pt100 3-Wire RTD. 1. DVDD=AVDD=2.4V 2. PGA gian=32 3. IDAC current=100uA BR Jerry
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Forum Post: ADS1292R: Respiration rate is highly sensitive to body motion and why current consumption is different when sensor is on-body and off-body, which respiration rate mode is enable
Part Number: ADS1292R Tool/software: Hi , We are designing/testing our wearable ECG/HR/RR sensor patch using TI ADS1292R , and we found that respiration rate (RR) is highly motion sensitive : normally RR is in the 12-20 bpm range (breathes per minute). . But this (left-side) chest-worn sensor patch can give RR reading that immediately jumps from this normal range to 30-40 bpm if we move our arms briefly, suddenly. Note that HR Heart rate reading doesn’t have this motion sensitivity issue (HR is quite stable, and isn’t affected much by motion). Is ADS1292R RR design prone to this type of (large variation ) issue due to motion sensitivity ? Is there a fix for this and/or any app note that discusses filtering/averaging technique to reduce the effect of motion on RR ? A 2nd question also related to RR is the following : - When RR mode is disabled, current consumption by the chip is not affected by whether the sensor patch is off body or chest-worn. - When RR measurement mode is enabled (this is configured via a register bit in the ADS1292R chip ) , then current drawn by the chip is quite a bit lower (by 400uA) if the sensor patch is worn on the chest (on-body) via 2 electrodes & adhesives (to make contact with the skin on the chest ) VS when the sensor patch is not on the chest (off body): 1408uA (when off-body) vs 983uA (on-body) Are you aware of such Current-Consumption behavior of the ADS1292R as a function of whether RR is ON/OFF & electrodes off-body/on-body? Is it a known characteristic of RR design in ADS1292R ? Or it is a pcb board or setting error in our design ??
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Forum Post: DAC81408: POWER SUPPLY DESIGN (VCC & VSS PINS)
Part Number: DAC81408 Tool/software: Hi Team, We are using DAC81408E in one of our design. The output of DAC, connecting to an Analog Input of Servo Drive, the range of input is +/-10V differential. Can you please suggest a power device with minimum size. In my design, currently I have 12V, 5V, 3.3V and 1.8V. So, mainly I need to generate -12V for analog input. Please suggest a solution for this. Thanks Vjohn
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Forum Post: RE: DAC11001B: DAC11001B 0-5v
Hi, Schematics looks OK to me. for the reference section, you can have 100p instead of 0.1uF. Regards, AK
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Forum Post: RE: ADS1298ECGFE-PDK: AC lead off detection for skin-electrode impedance measurement during ecg acquistion.
Hi Ryan, Thank you for response. Could you please tell me how the above is performed on the ADS1298 board for AC lead off detection? I'm a bit confused with it.
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Forum Post: RE: AMC1303M0510: bipolar to unipolar adc conversion and measurable maximum frequency of input
Hi Alexander, The above circuit is taken for reference design EVAL-M5-IMZ120R-SiC from Infineon , I tried simulating the above filter, at around 1kHz frequency we observe a phase deviation of around 2 degrees, i don't think the phase deviation is too much , but i am concerned about the degradation you mentioned above, could you please explain how degradation may happen in detail.. Thanks, AK
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Forum Post: RE: DAC81408: POWER SUPPLY DESIGN (VCC & VSS PINS)
Hi Vjohn, Please refer to this reference design link " Optimized Power-Supply Circuit Solution for DAC81416 High-Voltage Output " for getting the -12V supply. In the document you can see the Rfb1/Rfb2 is been suggested for -24V, you can choose is appropriately to get the -12V power output. Thanks, Sanjay
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Forum Post: RE: ADS52J65: ADC RF input impedance question
Hello, Thank you for your response. I have already tried applying the information from figure 61 in the datasheet. The calculated values seem to convert to several ohms. However, this calculation doesn't work without knowing the load on the IC side. Is there a reason why the impedance of the IC's input port is not separately specified? If it could be provided like other ICs' RF input impedances, it would greatly help in designing and save time. I appreciate your assistance. Best regards,
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Forum Post: DDC3256: Data sheet pad numbering error
Part Number: DDC3256 Tool/software: On the data sheet On Page 5 IN0-IN255 are enumerated. This includes “T1-T10”. The total number of pins enumerated is 257 (for a 256-pin part) On Page 4, pad T1 is marked as “NC” I believe the listing of “T1-T10” should be changed to “T2-T10”
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Forum Post: RE: ADS8686S: external resistor matching and error canceling of them
Thank you for your answer. So my colleague is right, that not low impedant signal source leads to a gain error... As the error is dependent of the relation of external to internal impedance, it also varies with the 15% tolerance of the internal impedance. Is this correct? A calibration is not possible in my system, as I want to measure static supply voltages (passive with resistive divider) which I cannot adjust to calibration points. With this context, I think, the following marked sentence in the datasheet is misleading, and this one is wrong (it mentions cancellation of any additional gain error contributed by the external series resistance ) In this example, the 3k external resistors introduce a 0,3% gain error but no additional offset error. Regards Sebastian
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Forum Post: ADC108S022: Need Test support to read voltages for ADC108S022CIMTX/NOPB
Part Number: ADC108S022 Tool/software: Hi TI Team, We have i.MX8mp based platform and ADC108S022CIMTX/NOPB is populated on it. I prepared a shell script to read voltages from ADC chip which uses readymade adc_test binary with command below. " ./adc_test best " Additional Details: ./adc_test -h A5 IIO AD test v2.0 please select the right version! root@:~/IMX8_peripheral_test/bin# ./adc_test best A5 IIO AD test v2.0 open /sys/bus/iio/devices/iio:device0/in_voltage0_raw fail! With this adc_test binary it always find /sys/bus/iio/devices/iio:device0 and try to read all the attributes. In my case, ADC is detecting under device1 instead of device0. Can you help me to provide dynamic version to read input voltages and all the other attributes properly? Thanks, Maulik
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Forum Post: AFE4400: AFE4400 schematic review
Part Number: AFE4400 Tool/software: Hi， The schematic diagram of AFE4400 is shown below. Please help review and check if there are any issues. Thanks!
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Forum Post: RE: LMP92066: Voltage regulator to source -5v
Hi erin, So there is no any other part which is specification wise equivalent to LMP92066 and with both GaN and LDMOS output ?
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Forum Post: RE: LMP92066: Voltage regulator to source -5v
Hi Erin, My biasing sequence will be in this manner- Bias ON the GaN stage first 1. Set gate voltage VGC2 and VGP2 to –5 V. 2. Set drain voltage VDC2 and VDP2 to nominal supply voltage (+48 V). 3. Increase VGP2 (peaking side) until IDQP2 = 35 mA current is attained, and then subtract 1.0 V for final VGP2 bias voltage. 4. Increase VGC2 (carrier side) until IDQC2 current is attained. Bias ON the LDMOS driver stage second 5. Set drain voltage VDC1 and VDP1 to nominal supply voltage (+5 V). 6. Increase VGC1 (carrier side) until IDQC1 current is attained. 7. Increase VGP1 (peaking side) until IDQP1 current is attained. 8. Apply RF input power to desired level. pls suggest a suitable bias controller. Total number of PA used will be 4 qty.
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Forum Post: RE: DAC63204EVM: Smart-DAC-EVM-GUI - Error 1003
Thank you! I check the LABview runtime and even I have installed it directly from NI webpage and the problem is the same. Please, let me know if there is solution for this issue. Fortunately, I have an old version for the DAC63204EVM GUI installed in other W11 system and it works ok.
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Forum Post: RE: DAC38RF85: Search for a 100 MHz clock generator with 10 MHz reference
Hi Kadeem, Thanks for the information. If you can check the phase noise with the CDCE6214, it would be perfect ! I am waiting for this result. Regards, Alain
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Forum Post: RE: ADC08D1000: Regarding FSR/ECE pin, H/L voltage levels and the timing at power-on
Hi Rob, Additional information obtained from customer, could you please advise. The customer is experiencing a phenomenon where FSR/ECE（pin14) behaves differently from the settings during a power interruption test. Two behaviors were observed during the power interruption test (power interruption). When FSR/ECE( pin14) is recognized as high (green line), and occasionally when it is recognized as low (red line). In addition, when recognized as low, it does not become high even if the voltage becomes 1.8V. Power supply conditions for recognizing high control: 0.85 x VA = 1.53 [V] Power supply conditions for recognizing low control: 0.15 x VA = 0.27 [V] * VA is the minimum operating voltage of 1.8 [V] The blue line is the waveform of VA rising when the product is normally turned on. In this case, FSR/ECE( pin14) was not recognized as low. e2e.ti.com/.../VA-waveform.xlsx Could you please answer 3 questions listed below. (1) It seems to latch up when FSR/ECE( pin14) is recognized as low. Is there a possibility of latch up? (2) If FSR/ECE ( pin14) is latched up, how can it be avoided? (3) Regarding the voltage waveform during a momentary power outage The voltage is rising without dropping to 0V, is this a problem? In the past, other devices have malfunctioned if the voltage did not reach 0V when the power was turned off. Are there any other problems with the voltage waveform? --- I appreciate your great help and cooperation. Best regards, Shinichi
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Forum Post: RE: ADS1230 Occasionally pulling and keeping DOUT high leading to all binary 1s being read, and low accuracy.
Just a heads up the DOUT being held high for long periods has been resolvede, we believe it was due to the shift register being updated mid-read. Bringing the clock period down to 10us resolves this, but we still have the issue of really serious noise, even with software averaging of 50 samples
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Forum Post: RE: DAC63204EVM: Smart-DAC-EVM-GUI - Error 1003
Hi Andres, That's actually good feedback that the DAC63204EVM GUI installed on another system. Are both of these systems on the same network/firewall? Is there any chance there are permissions being applied to on system and not the other? I finally have by new laptop so I can try downloading both as well tomorrow and hopefully I'll find some difference between the two installers. Best, Katlynne Jones
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