Forum Post: ADC34Jxx : Interoperability of JESD for ALTERA FPGA
Hi all, Could you share the inter-operability test data between ALTEAR JESD IP and ADC34Jxx family? Thanks in advance. Toshi
View ArticleForum Post: RE: Read error RDATAC ADS131E04
Hello, For testing purposes I am trying to measure 2.5V with only one ADS131E04 . With RDATA so I can get data perfectly, but with the RDATAC so I can not get correct data. I've attached my electrical...
View ArticleForum Post: RE: HSMC to ADC connector
https://www.altera.com/products/boards_and_kits/dev-kits/altera/kit-arria-v-rf.html . I am using board given in above link. it has 1 FMC and 2 HSMC , 1 fmc i am using for DAC and 1 hsmc-2 am using for...
View ArticleForum Post: ADS1220 signal is alwys high on Data Ready Pin (DRDY)
Hello, I am working on ADS1220 analog to digital board from olimex Board . Here is the link www.olimex.com/.../open-source-hardware an open source hardware for ads1220 . I am working with STM...
View ArticleForum Post: RE: About ADS8558's power suuply sequence
Hello Jose-san Thanks for your quick reply. And thanks for your easy to understand answer! We would like to try recommend to enable AVDD before HVDD. Best regards, Manabu Ito
View ArticleForum Post: RE: ADS1220 signal is alwys high on Data Ready Pin (DRDY)
Hi Sandeep, When both the AVDD and DVDD are applied to the ADS1220 , the ADC will take one conversion then power down. If you want to take another conversion you must send the START command. You can...
View ArticleForum Post: RE: ADS54J42 JESD204B Subclass 0 support
Tim, Per the data sheet, this part supports subclass 0. I will check with the design team on how to connect this input. Regards, Jim
View ArticleForum Post: RE: ADS1231 Low number of samples
Hi Abhijit, The shorted input tests appear normal. There is a slight negative offset (not unusual) and the code variation is within expectations for peak to peak noise. When you connect the load cell...
View ArticleForum Post: RE: TSW54J60/ADS54J60 interleaving correction behaviour at fs/4
On the device is marked: AZ54J60 TI 574 ZOHE G4 (TSW54J60 EVM Rev B) We want to use as much input bandwidth as possible (0-fs/2). The maximum bandwidth will be 200MHz+PA nonlinearities. This will be...
View ArticleForum Post: RE: ADS7886 conversion data after powerup and restart
Hi Hamamoto-san, From ADS7886 's Absolute Maximum Ratings table also as below, it's not a problem for Digital input which is not limited to ADC's +VDD, but it will be a potential problem for analog...
View ArticleForum Post: RE: ADS1291 Power Down
Hi Tom, i did a delay cycle before putting the PWM down and it worked! So the problem was that the ADS1291 didnt went to power down mode and i have to wait 2^10 Clock cycles before putting the PWM...
View ArticleForum Post: RE: ADS1220 signal is alwys high on Data Ready Pin (DRDY)
Hello Bob, Thank for the quick response and your explanation. I am unable to send Images here . I had prepared the block diagram for my connections and sent to the mail id pa_deltasigma_apps@ti.com....
View ArticleForum Post: RE: ADS1220 signal is alwys high on Data Ready Pin (DRDY)
Hello Bob, As my stm board has 5v and 3.3 volts supply so i connected AVdd with 5volts supply from board and Dvdd from 3.3v from same stm board and Avss and Dgnd are taken from the STM board ground so...
View ArticleForum Post: RE: ADS1220 signal is alwys high on Data Ready Pin (DRDY)
Hi Sandeep, I found the email. Just FYI, we don't monitor the email as closely as E2E, so it is always best to start your questions on the forum first. If it becomes necessary we can email. You should...
View ArticleForum Post: RE: ADS8556/8555 internal reference long stability data
Hello Keiichi-san, We do not have long term stability data for ADS8556 /8555 internal reference. Best regards, Jose
View ArticleForum Post: RE: ADS131E08S reference accuracy discrepancy
Hey Bruce, Unfortunately we cannot provide that information publicly. If you would like, I can contact you via email and we can discuss further. Brian
View ArticleForum Post: RE: ADC34J44: SYNC input
Hi Toshi-san, 1. There is no min or max spec on this differential swing at this point. We will gather data and put that into the next data sheet release. The input circuits will look for some...
View ArticleForum Post: DAC8812, communication issue
Dear TI, On one of our old product, we are now using the DAC8812 (we were using AD5545 for many years). However, sometimes we have communication issues with the TI's DAC. We notice the problem by...
View ArticleForum Post: RE: ADS1291 Power Down
Great! Glad to hear that Michael! Were you able to ascertain whether or not the reset was actually taking place as well?
View ArticleForum Post: RE: Read error RDATAC ADS131E04
Hey Carlos, Would you mind zooming in on one of the sequences where you collect the data? Brian
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