Forum Post: RE: ads1299 hardware or software problem?
Hey Stefan, So are you saying the signal generator ground is connected to IN1N? In the cases of the bias pins and SRB pins, you are safe leaving them all floating. Regards, Brian Pisani
View ArticleForum Post: RE: ADC08131BIN(EOL) - VREFC
Mike san Thank you for your so prompt reply and your cooperation always! OK, we got it. Just in case, please confirm two points. VREF is 2.5V, that's why the maximum output(DO's data) is 2.5V, right?...
View ArticleForum Post: RE: Use external clock with ADC12J4000
Michael: We are looking into this and will respond shortly. --RJH
View ArticleForum Post: RE: Use external clock with ADC12J4000
Hi Michael Please see the detailed instructions in the attached document. The capacitors that are installed in the new locations should be the same value (slightly larger in value is OK too) as the...
View ArticleForum Post: RE: ADC08D1000 - Enable to reach the performance specifications
Hi Sebastian If you have FSR(pin 14)=High you are using the device in Non-ECM (non-extended control mode) with configuration done by pin input only. In this case the CalDly/DES/SCSb pin should not be...
View ArticleForum Post: RE: ADC10D1500RB, Question
Thanks Dongjin I'll do some checking to see if a version of firmware is available that supports external trigger on that board. Regards, Jim B
View ArticleForum Post: RE: TI AD12J4000 EVM with Xilinx VCU108
Hi Jim, Yes, SCR must = 1, otherwise there will be errors. For TI ADC12J400EVM GUI, I tried to change the setting of register 0x058, but the GUI version I am using does not allow me to do this...
View ArticleForum Post: RE: Holter monitor - wireless ECG with ADS1292 and Bluetooth
Dear Brian, thank you for prompt reply. Is evaluation module ADS1292R therefore only designed to use with the Windows software provided? Can it even measure real-world ECG signals e.g. from people? I...
View ArticleForum Post: RE: TI AD12J4000 EVM with Xilinx VCU108
Hi Jim, Please refer to attached screenshot of the captured K28.5 (0xbc) on the jesd_phy ip 8 lane output during jesd initialization. Please let me know if you need more signals. The jesd core clock is...
View ArticleForum Post: RE: Loading data from ADS4249EVM using "TR4" FPGA board.
Jim, Thanks for your reply. I want to use CMOS mode. Simple schematic that I need is below. TR4(FPGA board) <===(sampling clk, 14bit code data)=== ADS4249 I think that ADS4249EVM board continuously...
View ArticleForum Post: RE: ADS1115-Q1: Question about conversion time
Hello Bob, thank you very much for the detailed answer. Exactly what we needed! Best Regards Martin
View ArticleForum Post: AMC80 questions
Hi, I would like to ask you some questions about AMC80 as below. Q1) What is the difference between LM80, LM96080 and AMC80 ? Q2) Data read out cycle time condition of AMC80 Is there a restriction time...
View ArticleForum Post: ads1192 ，SPI read register value
I am New here. please help me out~ I try to test the spi interface between ads1192 and MCU. since i saw that the ads1192 has RREG: Read From Register mode. my plan is to read the default value of the...
View ArticleForum Post: ADS1118 slow "step" response
I'd like to use ADS1118 for both slow-varying thermocouple sensors (configured differential 0.256V FSR) and faster 0-3V position sensors (single-ended 4.096V FSR). In my evaluation tests, however, I...
View ArticleForum Post: RE: Loading data from ADS4249EVM using "TR4" FPGA board.
ChangHoon, That is correct. As long as the ADC has an input clock and is configured for CMOS mode. If you are using serial interface mode, you must also initialize the internal registers through a...
View ArticleForum Post: ADC34j22 EVM problems
Thanks for your time. I have recently bought this ADC34j22 EVM board. It supposed to be DEV ADC34j22 but I have mistakely ordered ADC34j22 EVM. Anyway I have lots of questions and hoping for your...
View ArticleForum Post: RE: DAC38j84
Hi Wally, Regarding your questions: 1a.All the FIR filters may be disabled except FIR0. This is basically 1x interpolation mode. 1b. I think the settling error may depend on external driving load and...
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