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Forum Post: RE: ADC34J23EVM: Unable to configure ADC & LMK04828 using ADC3000...

Hi Sukhdeep, If you have downloaded the GUI from the product webpage, then this is the latest GUI version. I am assuming you have done that, correct? Next, I would directly connect the USB cable from...

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Forum Post: RE: ADS1298ECGFE-PDK: RC Filter component on RLDOUT

Hi Benjamin, Thank you for your post. I think it makes sense to reverse the filter component order as you drew it. Primarily, these components serve to limit the DC current which may flow into the...

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Forum Post: ADS124S08: common mode consideration

Part Number: ADS124S08 Tool/software: Hi, I have a few questions that I am not clear about 1. I am trying to implement the universal RTD measurement circuit using the ADS124S08 as shown below I was...

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Forum Post: RE: ADS1299EEGFE-PDK: Signal integrity issue

Hello Madhumohan, Thank you for your post. Have you tried using a function generator or other signal source with a smaller amplitude, such as the internal square wave test signal? Regards, Ryan

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Forum Post: RE: ADS7057: Conversion Time and Falling Edges

Thank, will keep this in mind. Another question: I see in the datasheet a calibration needs to be completed after a power cycle. Is this a power cycle of bother rails? Just AVDD? Just DVDD? Either?

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Forum Post: RE: ADS1294R: Schematic Review Request

Hello Patrick, Thank you for your post. The schematic looks mostly correct! Just a couple comments: I believe there is just a typo in the net names for LA and RA following the low-pass filters. Should...

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Forum Post: RE: ADS1298: Cannot get ID

Hi Bogdan-Mihail, Thank you for your post. Cross-talk can be reduced using clean layout techniques. As you can see, there is quite a bit of overshoot on the SPI signals, especially SCLK. A smaller...

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Forum Post: RE: ADS1292ECG-FE: Idle mode

Hi Mo, Please excuse our delay. Do you still need help with this? You may find some useful posts on our FAQ page for the ADS129x family of devices: [FAQ] Common Questions for TI's ADS129x Family of...

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Forum Post: RE: ADS1299: Power consumption

Hi Saeed, Thank you for your post. Are you measuring AVDD and AVSS current in the same direction with respect to the ADS1299? I would expect the supply current to be equal and opposite polarity for...

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Forum Post: ADC12DJ3200EVMCVAL: What CAD software was used for eval board...

Part Number: ADC12DJ3200EVMCVAL Tool/software: Hi. TI provides the board design for the evaluation board ADC12DJ3200EVMCVAL as .brd and .dsn files. What CAD software was used to do the board design?...

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Forum Post: RE: TI-JESD204-IP:ADC09SJ1300

Hello Mitsuo, Yes this line rate is valid you have calculated it correctly. Yes this means you can operate the ADC JESD link in subclass 0 (without sysref) with an FPGA receiver in subclass 0. Best,...

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Forum Post: RE: ADC12QJ800: sampling clock delay going through PLL

Hi David, If both ADC PLLs are getting phase locked signals then each sampling clock generated by the internal PLLs will be aligned to each other. Now this is the ideal case where there is no routing...

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Forum Post: RE: ADC3562: state of SCLK between packets of SPI communication

Hi, Thank you for your quick response. I will wait for design team's feedback. Best Regards, Taki

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Forum Post: RE: ADS1298ECGFE-PDK: RC Filter component on RLDOUT

Hi Ryan, thank you very much for your clarification! That helps. I have another question about actively shielded channel wires, using the RLD signal. Does it make more sense if I open a new question...

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Forum Post: RE: ADS7057: Conversion Time and Falling Edges

This device uses AVDD as its main power source, and DVDD serves to set the logic level, so the suggestion is in the case of a power cycle on AVDD. Regards, Joel

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Forum Post: RE: ADS127L11: DRDY-pin is not getting low

Hello Iouri, That is good news that the ADC is working correctly after power-up. Looking at your timing waveforms, you are using the wrong SPI mode. The SCLK must idle low, not high. SCLK should be...

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Forum Post: RE: ADS124S08: common mode consideration

Hi Zaheer Hashim, Common-mode chokes are good for filtering out high frequency noise on the inputs. So yes you can use them, but you do not need to add them. That feels like a question you need to...

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Forum Post: RE: ADC12QJ800: Bypass SYSREF windowing for low CLK freqs

Hi David, The calibration does not change the setup and hold requirements, it simply helps align sysref to the clock that is sampling it. The datasheet does not specify the exact setup and hold as it...

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Forum Post: RE: AMC131M03EVM: AMC131M03EVM

Hi Mark, Does the GUI not move past the loading window? The GUI should still load without a connection to the EVM, it should just display a pop-up that prompts going into simulation mode. Thanks.

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Forum Post: ADS9219EVM: unable to read correct temperature from reg 0x91

Part Number: ADS9219EVM Tool/software: Hi, I'm reading constant 0x106 from temperature register which is roughly -20C per your formula. Device is at room temperature I can confirm read is correct by...

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