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Forum Post: RE: ADC12J400 Question

Jill,Are you looking for the VHDL code used by our capture card? If so, what mode are you using for the ADC? What FPGA are you planning on using?Regards,Jim 

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Forum Post: PCM1802 - Vref1

Hi All,Would you mind if we ask PCM1802?<Question>We'd like to take the value of Vref1 to the outside circuit to use as reference voltage of Analog Input.How much value of resistor it can connect...

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Forum Post: PCM1680,PCM1681 - output from Vcom

HI All,Would you mind if we ask PCM1680, PCM1681?<Question>The datasheet on P28 shows, "If Vcom pin is to be used to bias external ciruitry, a voltage follower is required for buffering purpose."...

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Forum Post: RE: TSW14J56 EVM

Jim,No problem. I have a DAC working but am having trouble with the ADC and resets.The DAC board is the TI DAC38J84EVM.The ADC board is the TI ADS42JB69EVMThe FPGA board is the TI TSW14J56EVM which has...

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Forum Post: RE: DAC38J84EVM Alarms

Matt,Thanks for the help. Since it is producing very nice sine waves, I had to assume it was not too important, but it's nice to be reassured. I'll confess I'm still baffled by the LMK04828 and am...

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Forum Post: ADS42JB69EVM clock rates

Hi,I'm using the TI ADS42JB69EVM with the TI TSW14J56EVM board. By using the GUIs that come with each, I've managed to get sine waves read into the TSW board. I LOAD the default...

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Forum Post: RE: TSW1400 EVM capture event and USER_LED interpretation

venkatesh.viswanathan@commscope.com

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Forum Post: RE: DAC38J84 / modulation signals

Hi Kato,I'll need some clarification here. Do you want to output all three signals from the same DAC at the same time or just one at a time?Are signals 2 and 3 supposed to be the same or is that a...

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Forum Post: RE: About EVM of DAC5681Z

Hi Satoshi-san,The DAC doesn't place any limits on the type of signals that are used. The only concern would be a true pulse output while using interpolation if a sharp edge is desired. The...

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Forum Post: RE: ADS8363 with +-10V signals

Hi Niels,I'll send along an e-mail to the address in your profile with some suggestions on how you might implement the combination of both single ended and differential inputs.  The CMx inputs are...

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Forum Post: RE: LMP90080

Hi MikeIt works, Thanks for the HelpRolf

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Forum Post: ADS1271 - Frame sync serial interface, start-up problems

We are using an ADS1271 in our application. The design is finished and now we recognize a very nasty behaviour of the frame sync serial interface:The datasheet tells us on page 5 that the SCLK is a...

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Forum Post: RE: ADC12J400 Question

Jill,The link below will provide the firmware that was generated with the MTI JESD IP core. We are currently working on a new build that will use the Altera Mega-core JESD IP. This shoud be available...

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Forum Post: RE: ADS7263: Single ended signal (use of CMA and CMB in pseudo...

Hi Tom,Concerning your Answer: considering the "fully differential mode" with the VREF as negative input, should I design the the R and C like describe page 39.I attach you the schematic part of it for...

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Forum Post: RE: TLV320AIC3256 linux driver

Hi Hari,For TLV320AIC3100 codec tlv320aic3x driver is not supporting.entire register map is different.Can you tell which driver need to use  for kernel 3.4RegardsPunith

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Forum Post: RE: TLV320AIC3110

Hi,Eli,1.Both.2.if you want to calculate it,you need to know current consumption of everypart,eg digital core,PLL... . Could you explain why you want to know the maxmin current of DVDD, you want to...

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Forum Post: RE: LMP91000 GUI, hardware not detected

Hello,It looks like the driver was not properly installed. With the device connected to the computer go into the device manager select the SPIO-4 board and uninstall it. Then disconnect the board and...

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Forum Post: RE: leadoff is getting detected in ADS1198ECG-FE

Dear All,                I am seeing noise on the display screen. when lead off is getting detected. I cross verified and I inserted ECG cable properly and placed electrode properly. Still i am getting...

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Forum Post: RE: ADS1232 with external clock

Hi Dogan,I'm not quite sure I'm following your logic.  Using the internal oscillator of the ADS1232, you will only get 50/60 Hz rejection at 10sps data rate.  This is because the sinc filter notches...

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Forum Post: RE: TSW1400EVB Source Code

Hi Chuck,I need the verilog or vhdl FPGA code. I will need to develop my own firmware because I will use CMOS port to control another emission board. I already use TSW1250 and you send me the verilog...

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