Hi Akira Sugimoto, [quote userid="610521" url="~/support/data-converters-group/data-converters/f/data-converters-forum/1468879/ads114s08b-logic-output-types/5639069#5639069"]Is my understanding correct that DIN, DOUT, and SCLK signals can be shared via same bus, and CS and DRDY signals should be used independently each devices[/quote] You can use a single DRDY pin, you do not need to use them all. The DRDY pin should transition from high to low at approximately the same time if you start the conversion for all ADCs at the same instant. Therefore, one DRDY pin is sufficient, as long as you add some buffer before clocking out data to account for any small device-to-device delays Alternatively, you could use something like an AND gate for all DRDY signals. Then, the AND gate will indicate when all DRDY signals transition from high to low. [quote userid="610521" url="~/support/data-converters-group/data-converters/f/data-converters-forum/1468879/ads114s08b-logic-output-types/5639069#5639069"] How about the case that conversions are controlled by commands with keeping the START/SYNC pin low [/quote] Yes this is also fine [quote userid="610521" url="~/support/data-converters-group/data-converters/f/data-converters-forum/1468879/ads114s08b-logic-output-types/5639069#5639069"]or the case that DOUT signals are selected with the multiplexer?[/quote] You could do this as well There is no one right answer to this question, there are many options you can choose -Bryan
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