The falling edge, is out of scope (roughly a view hundred microseconds). For testing I used a simple mikrocontroller setup, which causes this delay between the CS edge and normal communication start. I configured only the range select to use 1.25*Vref (0b1011) and the set both the SDI and SDO mode 0b00, which would be Mode 0 according to the datasheet. The SPI Mode would be 0b00 anyway after reset, but I just wanted to be safe on that side. Those are the only registers I "change" during setup.
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