KH,
thanks again for your help.
As I understood the DACCLK depends on the interpolation, because the interpolation multiplies the number of sample points. So it means if I had 200MSPS, after x2 interpolation, I'll have 400MSPS.
On the page 49, DAC3484 Dataseet, is written "Similarly, data from the FIFO is read by the FIFO Out Clock 64-bits at a time from the address indicated by the read pointer." what does it mean by 64-bit at a time? DATACLK is written 16-bit at a time, and it needs two cycles for 64 bit, i.e 16-bits for half cycle. It can also be read from the block diagram, figure 52 or simply from the description, how long it takes to write the data.
So how fast should be my DACCLK for the configuration above, i.e. x2 interpolation, 200MSPS => 400MSPS after x2 interpolation, to read the data?
And where can I read it in the datasheet (for the future works, I guess I overseen smth or didn't understand)?
best regards,
den