Thanks for clarifying Ryan,
Also, just a relevant note, it appears that Table 7 in the Demo Kit User's Guide (slau443.pdf or http://bit.ly/17xnw89) has the J5 pins backwards. Following the actual PCB trace, it seems that the schematic is CORRECT, while the Table 7 layout is INCORRECT (e.g. /PWDN and JP5 are connected to J5:5, NOT J5:6).
Best,
Jesse