Hi Fernando, I'm sorry for the delayed response. The STATUS bytes you're showing (72 with good data, and 73 with bad data), indicate two different errors: STATUS = 72 = 0x48 ( ADC1 data new & PGAL_ALM ). You are reading a new conversion result, but the internal PGA is saturated, with at least one output signal that is trying to drive below AVSS+0.2V. Therefore, the result you're reading may appear to have a gain error since the PGA is operating in a non-linear region. STATUS = 73 = 0x49 ( ADC1 data new & PGAL_ALM & RESET ). In addition to the above information, the RESET alarm would seem to be indicating that the device got reset somehow. If this is not an SPI communication error, but the actual STATUS byte value, then its possible that you're reading the data from a different channel than what you're expecting. If you see the RESET bit set while reading data, I would recommend issuing commands to read back all of the ADS1263 registers and check to see how they are programmed, you may need re-program the device and restart the conversion on the last channel you were sampling. I would check to see if perhaps something in the code is accidentally toggling the nPWDN/nRESET pin or check the AVDD and DVDD supplies to make sure they are not seeing a brown-out condition. Perhaps adding larger decoupling capacitors to these supplies (near the ADC pins) may help to avoid this condition. Do you have a schematic of your circuit that includes how the ADS1263 is powered? On a side note, you can start ADC conversions by setting the START pin high. Toggling the START pin, as you are, might explain why sometimes /DRDY remains low after a conversion and other times it returns high. If you only want to perform a single conversion then I would set the START pin high, delay, then set START low and wait for the /DRDY signal to go low.
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