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Forum Post: RE: DAC8581 tUPDAC timing

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Hi Mark,

It isn't necessarily impractical for you to use the DAC8581, we've just noticed some process shift over the lifetime of the part that can cause some issues in certain configurations. We are working with our final test team to implement a screen at final test to ensure that the issue doesn't make it to the field any longer, but it has not been completed yet. We can try to access whether it's practical for you to use the DAC8581 if you can share a schematic (either on the forum or we can take this offline to email) and share what performance parameters are most important to you.

As of right now there is no plan to NRND the DAC8581. Since we noticed the process shift we have simply marked it not recommended for new design. For the foreseeable future you do not need to worry about making a lifetime buy.

The timing diagrams are not always to-scale. So despite how the illustration looks tUPDAC is actually much longer than tWAIT. tWAIT is expressing the time it takes for the digital interface to decode the input command, apply the new data to the corresponding register, and cause the appropriate action to begin to take place. It's what I labeled as "dead time" in the blog post Eugenio linked you. Violating tWAIT could create issues with the digital interface (of course, there is margin built into this spec so you might be able to take a few parts into the lab, violate it, and see no issue). As long as you wait tWAIT after the 16th falling SCLK edge your word will latch to the DAC data register.

tUPDAC is an odd specification to be present in this table, it's not something we would normally include in a digital timing table. This is the settling time specification of the device which matches the settling time to 0.003% FSR specification in the electrical characteristics table for an 8-V step. This includes the dead time, slew time, recovery time, and linear settling time. It really should be listed as a "typical" value though instead of a minimum since if we were to make a smaller step on the output the settling time would be much less than 1us since we cut out the entirety of the slew region.


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