Hi Richard,
Thanks for the very very detailed reply. Yes, I do have a serial number inked on the EVM. The number is "126".
The ADC input frequency I am probing at the clock pin of ADC EVM (J17) is 96 MHz, 0.93 Vp-p. The ADC input signal that I am giving at J11 has a frequency of 1.2 Mhz and 1 Vp-p. I will take a screenshot and attach it below respectively.
Yes, I checked the DRY signal. For lower frequencies I got it as more of a square wave, while for higher frequencies I got it more as a sine wave. ( I assume it is because of the bandwidth of the scope. Please let me know if there could be some other reason).
Changing the IDELAY tap setting - Will I be able to see the same in chipscope? Because, at the moment I am not able to see the effect!
Yes, I am getting a pattern similar to what you mentioned in your second post. My MSB varies with same frequency as input. Next bit varies as a low-high-low-high signal, and so on.
PS : I am also attaching the screenshot of the input and output of my ADS54RF63-FPGA-DAC34SH84 system! I find from chipscope that my ADC digital output is noisy! You can also see it from the attached final analog output! I would like to know why these noise could appear? As I increase the frequency of the input signal, the noise at the output increases!
Output (BLUE) when input (GREEN) is 2 mhz is shown in first figure. 
Output (Blue) when input is 17.3 Mhz (green) is shown in following two figures!
PPS : Thank you for your patience for helping me up to this stage. It has been very much positive!
Regards,
Basil.