Hi Ibrahim,
Have you been able to observe an LVDS clock?
To rule out SPI settings, lets try to configure the ADC using the parallel mode. Simply toggle the RESET pin to reset the part. The DFS pin will then control the output format based on table 4 in the datasheet. You should be able to observe a clock output in either LVDS or CMOS format, depending on how DFS is wired. If no clock is seen, then this seems to point toward either a circuit issue or a manufacturing defect.
Regards,
Matt Guibord
