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Forum Post: RE: ADS1218 - ssi clock

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Hi Bob,

Thanks for the detailed description . It gave me brief insight about the procedure . This is the sequence i think ADS follows:

As soon as i keep the PDWN, RESET and DSYNC pins logic high the ADS starts converting data .

After it has converted its first cycle  DRDY goes active low and then i can use RDATA command to read data .

In RDATA command i will send write command and will let the clcok on upto clock t6 .

then i will shut my clock down during t6 and again give clock to read data from slave .

Is it how it works ?


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