Hi Keiichi,
If you write to any of the first 4 registers, the conversion cycle will restart. If a command is issued, such as SELFOCAL, the conversion cycle will take extra conversion time beyond the normal data rate. As I cannot tell what is being issued, I cannot verify the operation. When DRDY transitions from high to low, that is the signal for the new conversion is ready to be read from the device.
One thing you must be careful to do is to keep the duty cycle of the SCLK within the requirement of low and high dwell time to within 25-75% of the SCLK period. From the scope shots it appears that this may be in violation. If this is the case, it is difficult to know how the device is interpreting the data that is sent to it. It may even be going to SLEEP.
Best regards,
Bob B