Thank you for that information Kevin. I can certainly give the shutdown option a try but high z out may not turn off my NMOS very fast. If using 10 bit 100 Hz PWM as I originally stated, it's probably not an issue but I had wanted the PWM rate above audio so 20 KHz or more. Even using only 8 bit 20 KHz PWM the min pulse width would be 1/256/20000 =~ 0.195 uS. I scaled down the PWM rate because of the settling time spec of the DAC. Thus, it would be interesting to know where the bulk of that time comes from. If it comes from the settling of the R-2R switch network or anything prior, it won't limit me if I don't change the codes. If however, it is the buffer amps that account for the majority of this settling time spec then I will need to plan on using a lower PWM rate than initially desired I know that there are likely better TI DACs for this application but the size (4x4mm) and number of units in the package (octal), and the extremely attractive pricing are driving certain compromises. Thanks for any further information regarding this settling time spec.
Regards,
--john filipetti--