The LRCKO is derived from a VCXO 24.576 MHz divided down by 512 to 48K. LRCKI is derived from a 125Mhz clock oversampling an AES3 input to create an effictive LR clock. That LRCK will inherently have at least the 8ns of jitter from the 125Mhz oversampler. Does that create a problem?
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