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Forum Post: RE: HSMC-ADC Bridge Rev A with ADS6445EVM

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Hi,

We can swap out your revA hardware for the revB hardware.  Actually, we have just gone to rev C which is the same as the revB except that the ADC connector was uograded to the locking Samtec connector that has an RT-1 in the part number to indicate retaining clips.   You could use either the revB or the newer rev C.  Both will plug into your EVMs.  

The original adapter pin assignment was set for us by an Altera guy who looked at the signal named FCLK and naturally wanted to put that on a clock input.  And depending on how you want to use the signal, some people do want it on a clock input.  For my FPGA implementation, I latch in FCLK like any other data channel that meets setup and hold time around the bit clock so I want to see the signal on a data pair as you do.   But I have seen app notes from other sources that treat the FCLK as a clock input, so I guess there is not one solution that will please everybody.

The literature number on the web says revA because it was revised since the first release.  So that document saying revA does not tie it to the hardware that was revA.  That is an unfortunate bit of confusion there.  Our hardware started with revA and the document with no revision, then the hardware goes to revB and the document goes to revA. 

For the ADS6445 the revision A is the current and only revision of the EVM.

If you can provide me with your contact info then I will try to round up two of the revB or revC boards.

Regards,

Richard P.


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