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Forum Post: ADC128S102: ADC128S102QML-SP versus ADC128S102 minumum clock frequency

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Part Number: ADC128S102 Tool/software: Hi, We are presently planning to use ADC128S102QML-SP in a new design using 1MHz clock frequency (minimum clock frequency for this device is specified as 800KHz). For early breadbording stages, we were planning to use ADC128S102 as replacement but the minimum clock frequency of this device in the data sheet is specified as 8MHz minimum and 800KHz typical. This is obviosly a typo so, can ADC128S102 be operated with 1MHz clock frequency? Regards, Xavi

Forum Post: RE: ADS127L18EVM-PDK: TDM mode configuration

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You are right data words also for the other channels are seen with oscilloscope. The issue has to be in the receiver side in spite of the fact that the number of bits to be received has been set to 64.

Forum Post: AFE881H1: Slew time of sinusoidal mode

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Part Number: AFE881H1 Tool/software: Hi team, The datasheet shows below equation of Slew Time, but the customer noticed that this equation only applies for linear mode and actual Slew Time of sinusoidal mode is much shorter than calculated value(>100 times). What is equation of Slew Time for sinusoidal mode? Best regards, Shota Mago

Forum Post: RE: ADC12DJ5200RFEVM: ADC GUI script for ADC12DJ5200RFEVM

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Hi ttd, I think it is worth trying to uninstall and then reinstall, yes. I'm not sure how to specify any english specific install however. I think the OS language determines this. Is it possible to try on a separate PC which you can set the language to PC for? I don't know what changing the language on your main PC will do and because of this, I don't want to suggest you to do it on your primary PC for obvious reasons. If you have a second PC or laptop you can try this on, I would highly suggest this. Thanks, Chase

Forum Post: AFE4960P: AFE4960P: Request for Register Map and Technical Reference Manual (TRM)

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Part Number: AFE4960P Tool/software: Hello, I am a student at Chengdu University of Information Technology. I am currently working on a biomedical research project to develop a wearable ECG + PPG monitoring prototype. The AFE4960P fits the technical requirements of our design, and we are using it for synchronized multi-channel signal acquisition. To proceed with development, we need access to the AFE4960P Register Map and Technical Reference Manual (TRM) in order to configure LED current, sampling rate, gain, and synchronization settings. I confirm that this project is strictly academic, with no military or commercial use. Could you please help grant access to the relevant documentation? Best regards, Qiang Qi Student, Chengdu University of Information Technology Email: 3230308041@stu.cuit.edu.cn

Forum Post: RE: ADC3422: test PRBS generated on LVDS outputs

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Hi Andrea, Just a quick update, I am looking into this and discussing with design on the results. Just a silly question if the data formatting on your side correct? The data should be in 2s compliment when capturing. Regards, Rob

Forum Post: RE: AMC1306M25: Duty cycle variation

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Hi Zoey, As long as the datasheet specifications are observed where 40 to 60% duty cycle is accepted, I would not expect this to cause an issue.

Forum Post: RE: ADS1256: ADS1256 ADC Circuit Design Review - 0.1-20 Hz Signal Sampling at 100 SPS

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Hi Hüseyin Yalçin, Many of your cap values are incorrect, see the recommendations from the datasheet as shown below The OPA735 looks like it has +5V nets on both supplies, which obviously will not work. Why not use something like LM27762: this devices takes a single supply voltage and generates a stepped down, clean bipolar output. So for example you can apply 5V to VIN and then get +/-2.5V on the output. This makes the most since because you will already have to generate a bipolar supply for the OPA735 in your existing circuit. Why not just remove the REF + buffer + inverting amp and just use a single, simple device to generate your supplies? -Bryan

Forum Post: RE: DAC8831: noisy output

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Hi Katlynne, Thank you for your reply! Following your suggestion, I measured the reference voltage, its noise level is acceptable. The issue appears to stem from DAC glitches interfering with the output. The results are plotted as follows. I have searched DAC glitch mitigation methods in the forum. I have found three methods: 1. RC filter at the DAC output. 2. Sample-and-hold (S/H) switch at the DAC output. 3. Capacitor between the output and feedback loop. So far, I have tried the first method (RC filter) and observed improvement. I have following questions: 1. Is C10 (in the first PCB layout in Figure 1) an example of the capacitor mentioned in the third method? The figure shown as follows is the third method. 2. Would combining all three methods yield better glitch suppression? Is it necessary? Thank you for your time and support! Best regards, Chen

Forum Post: RE: AMC7908: Is there a datasheet for the AMC7904RGET?

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Hello Bruce, you can order this part straight from TI.com or from our distributors. You just won't find an online presence for it, and we have a very healthy amount of stock available but do suggest a 12-week lead time for orders greater than 50Ku.

Forum Post: RE: ADC128S102: ADC128S102QML-SP versus ADC128S102 minumum clock frequency

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Hi Xavi, Yes, the datasheet minimum is intended to be the typical value and vice versa. You can run the ADC128S102 with a 1MHz SCLK. Regards, Joel

Forum Post: RE: ADS114S08EVM: The voltage across C88 is higher than the voltage at the ADS114S08EVM input terminals A8 and A9.

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Hi Shinichi Inoue, I was able to test my setup quickly using the pull-up/pulldown resistors, and everything worked well. I am not able to take data for 30 minutes at this time, but there is no reason why the device would work for 30 minutes, then provide bad data briefly, then work fine again. This seems like an external event is causing this problem Are you able to answer the two questions I asked in my last reply? -Bryan

Forum Post: RE: ADS7138-Q1: Abnormal read register value, unable to successfully write register

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Hi Ziming, It appear that the controller is sending the NAK to the device in the logic capture frames you provided. It only is expecting one 8-bit data frame from the device, and a NAK tells the device to stop outputting conversion data. Because of this, you are not reading in the full conversion. You will need to configure the controller to read in more than 1 byte before sending a NAK, but I don't know how to accomplish this with your specific command line tool. 1. Due to the condition above where the controller sends a premature NAK, I will say that this sequence is not meeting the requirements, and you will need to change the controller configuration as mentioned to read in at least 2 bytes of data at a time, as 1 ADC conversion is encoded across 2 bytes. 2. At the moment, no. The full 12-bit conversion is encoded across 2-bytes. The first byte contains the first 8 bits of ADC data (D[11:4]), and the next byte contains D[3:0], followed by 4 zeroes at the end by default. I do believe we are getting closer to the desired result, and the logic captures are very helpful in debugging this. Please continue sending logic captures, and I can help further. Regards, Joel

Forum Post: RE: ADS7142: Use as standard ADC

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Hi Derek, Yes, the ADS7142 is a great choice for a 12-bit, I2C ADC. The various monitoring features are not required to use. For example, If you just want to read conversion data as a minimum, you can simply follow the description in figure 56. The default configuration should be okay for your case, reducing your need to read or write to registers. Your current schematic is good, but I recommend decreasing C131 to 1nF at most if you are sampling an AC input signal at higher speeds. Another option with 1.8V I2C support is the ADS1015L, which has a lower sampling rate. Feel free to take a look at the datasheets and let me know if you have any questions. Regards, Joel

Forum Post: RE: ADS7028: Read and Write Issue with ADS7028

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Hi Ege, Thanks for reaching out. Are you able to send some more zoomed in pictures of the communication, and see the SCLK transitions clearly? Alternatively, a logic analyzer capture would also be best if you have one available. One thing I am noticing however is that the rise time of the ADS7028 SDO is fairly slow after ~CS goes high. This alone might not be the issue, but can you share a schematic or the pull-up resistor value you have on this line? Regards, Joel

Forum Post: RE: ADC121S021: ADC121S021 with Op-Amp

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Hi Fahad, Apologies for the delayed response. The schematics for the ADS8665 and the ADC121S021 look good, but I would recommend putting series resistors on the digital lines, especially SCLK, if you are also placing them in series with the SDO line. They might already be there on the controller side though. For the ADC121S021, I would also place a small RC filter to help drive the input of the ADC. A 22 ohm, 1nF filter should be good. This is not necessary for the ADS8665 since it has an integrated front end. I haven't been able to verify the performance in SPICE, but maybe it would help to crosspost this schematic to the amplifiers forum, so they can give more specific guidance to the operation of the OPA206 and OPA328, and whether any limitations on the input or output exist that might affect your input to the ADC. I suspect they are mostly covered in the example circuit you shared though. Regards, Joel

Forum Post: RE: AMC7908: Is there a datasheet for the AMC7904RGET?

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Sorry, could you give me the standard pricing for 5x pieces and for 100x pieces?

Forum Post: RE: DAC8831: noisy output

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Hi Chen, Good to see adding an RC filter helped mitigate some of the noise. A capacitor between RFB and VOUT is correct for question 1. Combining all three methods would help. The DAC8831 is an old R2R DAC, and these DACs tend to feature bad glitch, which is showing as noise on your output. If you don't require the low power of the DAC8831, you could look into some of our low noise/glitch DACs, such as the DAC82001. Thanks, Erin

Forum Post: RE: AFE4400: AFE4400

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Hi Nissy, Thank you for your question! We have a variety of AFEs that can support the bio-signals you have listed. You can view an overview of our AFE offerings on this webpage in the interactive overview. Our AFEs do not include the sensor itself. They intake the analog data from your system LEDs, LDs, electrodes, etc and output optimized digital data for further processing. We do not have publicly available free samples on TI.com but please email this list with some more details on your project needs, start of production timeline, and volumes needed, and we will do our best to assist. Regards, KD

Forum Post: RE: AFE4960P: AFE4960P: Request for Register Map and Technical Reference Manual (TRM)

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Hi Qiang Qi, We are unable to give access to students for our NDA-protected devices, including AFE4960P. I would recommend considering some our non-NDA and non-selective disclosure devices such as: For PPG and optical measurements: AFE4400 , AFE4403 For ECG and biopotential measurements: ADS129x in a variety of channel counts Regards, KD
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