Hi Bryan, I obtained additional information from the customer. There were no errors in the conversion data when you checked the method. However, the circuit with 2.5V as the reference voltage cannot be adopted because it was found to have problems with EMC resistance. On the other hand, an conversion error occurred when the customer checked the circuit in Figure 20 of the ADS114S08EVM manual. Although the situation improved when the PC's AC power was not connected, an error occurred once every 30 minutes. Please install resistors (500kΩ) at R71 and R72 on your board and check whether the phenomenon is reproduced. Could you please also see attached excel file? . e2e.ti.com/.../Question-regarding-ADS114S08EVM_5F00_250402-.xlsx ｰｰｰ I appreciate your great help and cooperation. Best regards, Shinichi
↧
Forum Post: RE: ADS114S08EVM: The voltage across C88 is higher than the voltage at the ADS114S08EVM input terminals A8 and A9.
↧
Forum Post: RE: AFE5808A: Gain attenuation issue of the AFE5808A
I have one more question. Could you tell me the frequency response characteristics (Flat Gain Bandwidth) of the AFE5808A's LNA or LNA+VCA+PGA at a specific gain setting?
↧
↧
Forum Post: ADS7049-Q1EVM-PDK: Is signal input to EVM at 50 Ohms?
Part Number: ADS7049-Q1EVM-PDK Tool/software: For the single ended signal input to ADS7049-Q1EVM-PDK, can it be from a 50 Ohm source or should be converted to high impedance source?
↧
Forum Post: RE: ADC3910D125EVM: Altium Designer Files
Hi Rob, Thanks for providing the link to the project documents. I really appreciate your help! However, I noticed that the schematic and Footprint library files are not in the Design Data folder. Would it be possible to also share the following files for the components in the schematic? Schematic Library (*.SchLib) PCB Library (*.PcbLib) Thanks again for your support! Regards, Jakob
↧
Forum Post: RE: AFE0064: AFE8128 JESD SERDES implementation..... long traces on PCB
New update.... I just ran the s-parameter analysis with the links against the CEI-28G-MR Specification as you suggested with my 100C links . I also ran ibis ami simulations in the TI provided testbench. I used the longest and shortest links in both directions. I was successful in getting data eyes in both directions. Please see the attached file. e2e.ti.com/.../LEIA-TRX_5F00_JESD_5F00_100C_5F00_AFE2AFE.docx Please look over my setup and results and let me know if you have any concerns/questions. I would like to go over things and get your feedback. Bob G
↧
↧
Forum Post: RE: ADS127L11: Output data problem
Hello Keith, Sorry for delay with reply. I am waiting for new part to arrive to rework the board. I will update once I have a part. Sorry for inconvenience Regards, Iouri
↧
Forum Post: ADS8699: Is there any other similar kind of adc with analog input range more than +/-6V and SPI compatible with 18bits or more precision
Part Number: ADS8699 Tool/software: Is there any other similar kind of adc with analog input range more than +/-6V and SPI compatible with 18bits or more precision
↧
Forum Post: RE: ADS131M08: input short by CFG register settings
Hi Dale, This is serious !! , it means we need to change the design. But before that can you please explain what should we expect by having the bridge mid points at 1.65v?? which is half the 3,3V supply at the ads131 input.
↧
Forum Post: DAC39J84: help needed in PRBS test
Part Number: DAC39J84 Tool/software: Hi, We are struggling with performing PRBS test. We are using Xilinx/AMD JESD204c IP and JESD204PHY IP to connect to 4 DAC39J84. On the FPGA side, we are configuring the JESD204PHY for PRBS as follows: PHY 0 => GT_INTERFACE_SELECTOR(0x024) = 0x0 (Lane 0) PHY 0 => TXPRBSSEL(0x0520) = 0x1 (PRBS-7 pattern) On the DAC side, we are configuring the first DAC39J84 for PRBS as follows: DAC 0 => config74 (0x4A) = 0x001E (disable JESD clock) DAC 0 => config61 (0x3D) = 0x208E (PRBS-7 pattern) DAC 0 => config27 (0x1B) = 0x0300 (route PRBS test out to ALARM pin, lane 0) Initially ALARM pin was high and after these configurations, the status of ALARM pin was low - seems perfect. But then we tried to change the DAC lane from lane 0 to lane 1, 2 and so on, but the status of ALARM pin remains low. Assuming the ALARM pin status is latched, we power cycle the board, and this time start from lane 1 but the result was same, we got low on ALARM pin which should be high. We repeat the test changing the PRBS type to other patterns but still got low on ALARM pin, indicating the test is passed!. We again power cycle the board, and this time, without doing any configuration to the JESD204 PHY, just configured the DAC39J84 for normal use, and without doing config74 and config61 settings just wrote 0x0300 to config27 register and this caused ALARM pin to go low. How to carry out the PRBS test? Thanks dac39j84 configuration was as follows: 0x00, 0x0218 0x01, 0x0003 0x02, 0x2002 0x03, 0xF380 0x04, 0x00FF 0x05, 0xFFFF 0x06, 0xFFFF 0x0C, 0x0400 0x0D, 0x0400 0x0E, 0x0400 0x0F, 0x0400 0x10, 0x0000 0x11, 0x0000 0x12, 0x0000 0x13, 0x0000 0x14, 0x0000 0x15, 0x0000 0x16, 0x0000 0x17, 0x0000 0x18, 0x0000 0x19, 0x0000 0x1A, 0x0020 0x1B, 0x0000 0x1C, 0x0000 0x1D, 0x0000 0x1E, 0x1111 0x1F, 0x1140 0x20, 0x0000 0x21, 0x0000 0x22, 0x1B1B 0x23, 0xFFFF 0x24, 0x0000 0x25, 0x8000 0x26, 0x0000 0x2D, 0x0000 0x2E, 0xFFFF 0x2F, 0x0004 0x30, 0x0000 0x31, 0x0000 0x32, 0x0000 0x33, 0x0100 0x34, 0x0000 0x35, 0x0000 0x3B, 0xF800 0x3C, 0x0000 0x3D, 0x008E 0x3E, 0x0108 0x3F, 0x0000 0x46, 0x0044 0x47, 0x190A 0x48, 0x31C3 0x49, 0x0000 0x4A, 0x001E 0x4B, 0x1F00 0x4C, 0x1F07 0x4D, 0x0300 0x4E, 0x0F4F 0x4F, 0x1CC1 0x50, 0x0000 0x51, 0x00FF 0x52, 0x00FF 0x53, 0x0000 0x54, 0x00FF 0x55, 0x00FF 0x5C, 0x1111 0x5F, 0x0123 0x60, 0x0456 0x61, 0x0111 0x6D, 0x0000 0x6E, 0x0000 0x6F, 0x0000 0x70, 0x0000 0x71, 0x0000 0x72, 0x0000 0x73, 0x0000 0x74, 0x0000 0x75, 0x0000 0x76, 0x0000 0x77, 0x0000 0x78, 0x0000 0x79, 0x0000 0x7A, 0x0000 0x7B, 0x0000 0x7C, 0x0000 0x7D, 0x0000}
↧
↧
Forum Post: RE: ADS131M08: input short by CFG register settings
Hi Dale, forgot to mention that we have a filter at the input composed of two 10K Ohm resistors and a capacitor. Will this change the common mode voltage ? Regards Saad
↧
Forum Post: RE: ADS8699: Is there any other similar kind of adc with analog input range more than +/-6V and SPI compatible with 18bits or more precision
There are multi-channel options like the ADS8598S and ADS8598H.
↧
Forum Post: RE: LM2596S-ADJEVM: LM2596S-ADJEVM
Hello I will close this post due to inactivity. Thanks
↧
Forum Post: RE: ADS9219: Long term stability
Hello Kuwahara-san, How is the ADS9219 going to be used by the customer? Is there a reason behind the concern of the long term drift of the INL/DNL? Best regards, Yolanda
↧
↧
Forum Post: RE: AMC1333M10: Measure Isolated AC with resistive connection INN to AGND
Hi Francis, Thank you for your question. Yes, I think this connection looks fine too. We outline split-tap connections in this app note as well for more information: Split-Tap Connection for Line-to-Line Isolated Voltage Measurement Using AMC3330 . Best regards, Eva
↧
Forum Post: RE: ADS7066: data acquisition phase and necessity of input drive amplifier
Hello! Thank you for posting on TI's E2E Forum! Also thank you for referencing a the referring E2E post. To answer your questions: 1. Yes, the acquisition phase will be extended so long as the CS remains low. If the throughput speed is not a priority then CS can be left low to extend the acquisition phases to fit the systems needs. 2. Great follow up question! Technically yes, depending on the input source and if allowed enough time it could be done without an input amplifier. We have this tech note going speaking about just this Optimizing Sensor Measurement: Driving a SAR ADC Input Without a Driver Amplifier . It goes through the calculations when the option to extend the acquisition phase (and slowing down sampling rate) in order to remove the need of an input driver amplifier. If interested, you could share schematic and if any sampling speed limitations for review and I could make recommendations. Best regards, Yolanda
↧
Forum Post: RE: ADS7049-Q1EVM-PDK: Is signal input to EVM at 50 Ohms?
Hi Mohandas, Assuming you mean when using an external signal generator. You should set it to Hi-Z mode. Regards, Joel
↧
Forum Post: RE: ADS7142: Inquiry regarding 5pin, 6pin_floating of ADS7142
Hi Grady, There is no issue in leaving BUSY/~RDY and the ALERT pin floating. No performance impact is expected. Regards, Joel
↧
↧
Forum Post: RE: ADS7138-Q1: Abnormal read register value, unable to successfully write register
Hi Ziming, It seems like the order you described is correct, but I need to verify that the utility is sending the correct data to the device as you expect it to. A logic capture or an oscilloscope capture of your sequence should suffice. I have observed in the past that these I2C command line utilities don't send data as expected. Regards, Joel
↧
Forum Post: AMC1303M0520: Letter of Volatility Request
Part Number: AMC1303M0520 Tool/software: To whom it may concern, I am reaching out on behalf of my employer to request a letter of volatility (LOV) for part AMC1303M0520. The LOV will be used to develop sanitization procedures for hardware which this part is installed on. Could you please provide an LOV for this part?
↧
Forum Post: UCC28C43: Letter of Volatility Request
Part Number: UCC28C43 Tool/software: To whom it may concern, I am reaching out on behalf of my employer to request a letter of volatility (LOV) for part UCC28C43. The LOV will be used to develop sanitization procedures for hardware which this part is installed on. Could you please provide an LOV for this part?
↧