Hi Gustav, Your original issue you have described seems to indicate that the second lane of the ADC may not be connected to the lane that you are using in the Quad. In the JESD IP core, I assume that you will have the sync header lock status for each lane. Do you see if any of the three lanes have achieved sync lock? Your waveform shows that the rxgearbox_slip is always pulsing, but I am not sure which lane this is for. There is a slip signal for each lane. Regards, Ameet
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Forum Post: RE: ADC12QJ1600: Connection issues with Versal VCK190 Eval Board JMODE4
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Forum Post: RE: TLV2548: Example code
Hi Kyle, it is a bit too late for us to go back and switch to another ADC. Is there any other way you could help us with our issue ? We tried using the Aardvark host adapter to see the ADC in action but the response of the ADC to basic command like write to CFR or read from CFR did not make sense. Sometimes the response were as expected but most of the times it did not make much sense. I'd appreciate any help in making this work.
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Forum Post: AFE5832LP: AFE_PDN_FAST
Part Number: AFE5832LP Other Parts Discussed in Thread: TX7332 Tool/software: I am not sure if I understand the AFE_PDN_FAST specifications 1) AFE_PDN_FAST requires 8us to wake up 2) but only if last woken up <500us previously, failing which it requires 4ms to power up. What method is recommended to keep the device in partial power down (and not fully powered down)? If a (-ve) pulse is sent every 500us for 18us? or is a longer pulse required (and for how long)? Our current operational sequence is as follows, but the automatic DC Offset indicates that the capacitors are still charging up after 18us (8+8+2us). 1) -ve pulse the AFE_PDN_FAST (wake up) 2) wait 8us for wake up 3) TX_Trig (to synchronise AFE) 4) power up the TX (using TX7332) 5) wait another 8us (for TX7332 to wake up) 6) pulse the TX7332 7) wait 2us for TX7332 to pulse and TR switch to activate 8) shut off power to TX7332. 8) start capturing on the AFE 9) end capturing 10) send AFE_PDN_FAST (+ve) to put AFE back into power down. process the data and send to imaging.... and repeat. Our processing takes <200us, so meeting the 500us requirement, yet the automatic DC-offset is not yet settled (in the 16us between AFE_PDN_FAST=0 to start capturing). Please advise.
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Forum Post: AFE5832LP: initialization of the AFE
Part Number: AFE5832LP Other Parts Discussed in Thread: AFE5832 Tool/software: I see this question from 1 year ago. How can I obtain the two cfg files mentioned? 6470.init.cfg and AFE5832_LVDS_12x_12b_CMD.cfg. thank you.
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Forum Post: RE: TSW14J50EVM: Design Files
Oh.. Here I see lot of files . Can you please download and check .
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Forum Post: RE: LMP92066: LMP92066: Programing of the IC via I2C.
Hi Erin, All supplies are applied properly and are verified.Sharing you the screenshot of schematic. e2e.ti.com/.../LMP92066.zip Regards, Rajashri.
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Forum Post: RE: AFE5832LP: initialization of the AFE
Hi, May I know why do you need this ? Can you please explain your problem in detail ?
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Forum Post: RE: ADS54J20EVM: FPGA design
Hi Dominik, We have the rapid IP firmware development tool. Please see the link below for more details. https://www.ti.com/tool/TI-JESD204-IP Regards, Geoff
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Forum Post: RE: AFE5832LP: initialization of the AFE
We are not convinced our reset is working, as it occasionally acts strangely (with misaligned data after reset). This misalignment occurs only occasionally, possibly 10% of the reset occurrences.... but enough to kill the product. We are hoping that it is just a register causing the problem.
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Forum Post: DAC81416-08EVM: DAC81416 not outputting expected value when used with Arduino DUE, but gives expected output when using USB2ANY connector and the EVM software
Part Number: DAC81416-08EVM Tool/software: Jumper Settings: J10 - 1-2 J2 - OPEN J3 - OPEN J11 - 1-2 J9 - 1-2 J7.1 - OPEN J7.2 - OPEN J7.3 - GND J7.4 OPEN J7.5 - 5V J7.6 - GND J7.7 - 12V Using Default SPI pins on Arduino DUE The code used: #include // Define SPI settings #define DAC_CS_PIN 10 // Chip Select (CS) pin for DAC #define SPI_CLOCK 1000000 // SPI Clock Speed: 1 MHz #define SPI_MODE SPI_MODE1 // SPI Mode 1 (CPOL=0, CPHA=1) // #define RESET 9 void setup() { delay(5000); // Start Serial for debugging Serial.begin(9600); Serial.println("Initializing DAC81416..."); // pinMode(RESET, OUTPUT); // digitalWrite(RESET, HIGH); // Set reset alwats high // Initialize SPI SPI.begin(); // Configure the CS pin pinMode(DAC_CS_PIN, OUTPUT); digitalWrite(DAC_CS_PIN, HIGH); // Set CS high (inactive) // Start SPI transaction SPI.beginTransaction(SPISettings(SPI_CLOCK, MSBFIRST, SPI_MODE)); // Enable SPI communication // writeSPI(0X00, 0x0001); // Step 0: Enable SPI communication (SPICONFIG register) 0x030004 // // Minimum SPI commands to configure and verify the DAC writeSPI(0x03, 0x0A04); // Step 1: Power up the DAC81416 (SPICONFIG register) writeSPI(0x04, 0x4F00); // Step 2: Use internal reference (GENCONFIG register) //writeSPI(0x06, 0x0000); writeSPI(0x09, 0x0000); // Step 3: Power up all DAC channels (DACPWDWN register) //writeSPI(0x0D, 0x0000); // Step 4: Set DAC0-3 voltage range to 5V (DACRANGE0) //writeSPI(0x05, 0xFFFF); writeSPI(0x10, 0xFFFF); // Step 5: Write full-scale value to DAC0 (DAC0_DATA) // writeSPI(0x01, 0x8100); // writeSPI(0x01, 0x8100); Serial.println("DAC Configuration Complete. Check Output Voltage."); } void loop() { // // Optional: Write a new value to DAC0 periodically for testing // writeSPI(0x10, 0xFFFF); // Write max-scale value to DAC0 // delay(1000); // writeSPI(0x10, 0x0000); // Write min-scale value to DAC0 // delay(1000); // writeSPI(0x10, 0x8000); // Write mid-scale value to DAC0 delay(1000); } // Function to write a 24-bit SPI frame void writeSPI(uint8_t regAddress, uint16_t data) { digitalWrite(DAC_CS_PIN, LOW); // Pull CS low to start communication SPI.transfer(regAddress); // Send 8-bit register address SPI.transfer16(data); // Send 16-bit data digitalWrite(DAC_CS_PIN, HIGH); // Pull CS high to end communication }
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Forum Post: RE: ADS1299: Bias Electrode
Hello Ryan, Thanks for your prompt response. In most cases, it is not necessary to include more than ~3-5 electrodes in total. However, those electrodes may be connected to separate ADS1299 devices. I didn't get the point you made.
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Forum Post: ADS1292: Offset between lead-I and Lead-II
Part Number: ADS1292 Tool/software: Dear Concern, We were thinking to use ADS1292 for one of our products. Everything is working fine. But we are facing issues to remove the DC offset. It will be really helpful if we get support regarding this as we are thinking to switch from the other supplier. 1. Here I've attached the screenshot of Lead-I and Lead-II: 2. We are testing with two simulators. a) With CONTEC MS400 Lead-I and Lead-II signals overlap with each other. b) With Fluke PS410 the offset shown above is created. 3. The register configurations are as below: ADS1292R_REG(ADS1292R_WREG|ADS1292R_CONFIG1, 0x02); ADS1292R_REG(ADS1292R_WREG|ADS1292R_CONFIG2, 0xE0); ADS1292R_REG(ADS1292R_WREG|ADS1292R_LOFF, 0xF0); ADS1292R_REG(ADS1292R_WREG|ADS1292R_CH1SET, 0x00); ADS1292R_REG(ADS1292R_WREG|ADS1292R_CH2SET, 0x00); ADS1292R_REG(ADS1292R_WREG|ADS1292R_RLD_SENS, 0x2C); ADS1292R_REG(ADS1292R_WREG|ADS1292R_LOFF_SENS, 0x0F); ADS1292R_REG(ADS1292R_WREG|ADS1292R_LOFF_STAT, 0x00); ADS1292R_REG(ADS1292R_WREG|ADS1292R_RESP1, 0x02); ADS1292R_REG(ADS1292R_WREG|ADS1292R_RESP2, 0x03); ADS1292R_REG(ADS1292R_WREG|ADS1292R_GPIO, 0x0C);
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Forum Post: RE: ADC12QJ1600: Connection issues with Versal VCK190 Eval Board JMODE4
Hi Ameet, yea that seemed to be one part of the problem. The data-lanes are incorrectly routed from the FMC (ADC Board) to the VCK190 Board. Since Vivado doesn't permit direct pin reassignment to non-expected pins, I've attempted to correct the lane connections at the JESD204c Core . I'll see if this build works. Interestingly this is also true for the TSW14J57-EVM. Summariezed: In the picture before is CH0 depicted, so due to the mess it shows the TX Data Lane 2 on ADC side. The slip happens on all lanes and sync is nowhere acieved since reg 0x410 reads back 0xff indicating sync failed on all lanes. Nevertheless, shouldn't at least on channel 0 (lane TX2) and channel 2 (lane TX1) sync be achieved? Thought that this process works independently on each lane?
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Forum Post: ADS131M08: Offset/Noise in measurements with the ADS131M08.
Part Number: ADS131M08 Tool/software: Good morning, everyone! I am using an ADS131M08 to read signals on my board, but I have been experiencing some unwanted oscillations in the collected values. After conducting some analysis, I identified that my ADC is consistently reading a voltage of 200µV on the channels, even when the inputs are completely grounded. The circuit I am using is as follows: In this case, I removed the capacitors in parallel with the inputs and disconnected what was coming from the rest of the circuit. Then, I interconnected my differential inputs and grounded each pair, leaving a 2.2kΩ resistor in the path. With this configuration, I am reading approximately 200µV on the channels or 1700 bits. I would like to know if this offset or oscillation is normal, as I couldn't find this information in the datasheet. The temperature is around 27 °C, and I am using an ADR127AUJZ as an external reference.
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Forum Post: RE: AFE5808AEVM: PCB Board layout
Hi, For demod feature usage we would recommend to separate the grounds. AFE58JD32LP has this feature whereas AFE5808A does not have this feature . If you are using AFE5808A you can follow AFE5808AEVM scheme .
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Forum Post: RE: TSW14J50EVM: 8CH limitation for TSW14J50EVM
Hi, TSW14J50EVM supports 16 channel . What is the exact issue customers are facing ?
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Forum Post: AFE881H1: AFE881H1: Hart Modem Write And Read Register With only SPI
Part Number: AFE881H1 Tool/software: Hello friends I am trying to use AFE881H1 with STM32H5. I will only work in SPI mode because I have no other free pins left in my processor. I enabled the SDO bit in the config register and disable the uart. Then I sent it as 32 bit SPI data. When I read back the config register to make sure it is correct, I get 0x00000000. I could not get a value with the read function. Am I not writing in the correct order or do I have a mistake? Can you help me? I will add my code below to help. void AFE881H1_Init ( void ) { // Software reset (assuming CRC is enabled [32-bit frame]) //AFE881H1_WriteRegister(AFE881H1_RESET_OFFSET, 0x00AD); // HAL_Delay(1); //AFE881H1_ReadRegister(AFE881H1_RESET_OFFSET); // Take reset state configuration ( hardcoded since SDO is not yet enabled) uint16_t config = AFE881H1_CONFIG_RESET_STATE; config |= (1 << 6); // Disable UART config &= ~(1 << 1); // Enable SDO // Write configuration AFE881H1_WriteRegister(AFE881H1_CONFIG_OFFSET, config); HAL_Delay(1); AFE881H1_ReadRegister(AFE881H1_CONFIG_OFFSET); HAL_Delay(1); // keep CS high for at least two clock cycles before issuing the next frame // Delay_us(3); } void AFE881H1_WriteRegister ( uint8_t address, uint16_t data_word) { uint32_t frame = 0; // Build the 24-bit frame (without CRC) frame |= (0 << 31); // Write operation (R/W bit = 0) frame |= (address << 24); // 7-bit address shifted to the correct position frame |= (data_word << 8); // 16-bit data word // Calculate the CRC on the first 24 bits uint8_t crc = CalculateCRC8ATM(frame); frame |= crc; // Append the CRC as the least significant 8 bits // Transmit the frame over SPI HAL_GPIO_WritePin(AFE_CS_GPIO_Port, AFE_CS_Pin, GPIO_PIN_RESET ); // Select the AFE881H1 (CS pin low) HAL_SPI_Transmit(&hspi3, ( uint8_t *)&frame, 1, HAL_MAX_DELAY); // Send the 32-bit frame HAL_GPIO_WritePin(AFE_CS_GPIO_Port, AFE_CS_Pin, GPIO_PIN_SET ); // Deselect the AFE881H1 (CS pin high) } void AFE881H1_WriteRegister ( uint8_t address, uint16_t data_word) { uint32_t frame = 0; // Build the 24-bit frame (without CRC) frame |= (0 << 31); // Write operation (R/W bit = 0) frame |= (address << 24); // 7-bit address shifted to the correct position frame |= (data_word << 8); // 16-bit data word // Calculate the CRC on the first 24 bits uint8_t crc = CalculateCRC8ATM(frame); frame |= crc; // Append the CRC as the least significant 8 bits // Transmit the frame over SPI HAL_GPIO_WritePin(AFE_CS_GPIO_Port, AFE_CS_Pin, GPIO_PIN_RESET ); // Select the AFE881H1 (CS pin low) HAL_SPI_Transmit(&hspi3, ( uint8_t *)&frame, 1, HAL_MAX_DELAY ); // Send the 32-bit frame HAL_GPIO_WritePin(AFE_CS_GPIO_Port, AFE_CS_Pin, GPIO_PIN_SET ); // Deselect the AFE881H1 (CS pin high) }
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Forum Post: RE: AFE881H1: AFE881H1: Hart Modem Write And Read Register With only SPI
I added the write function a second time instead of the read function. Sorry for that. I also enter the values of settings such as config. #define AFE881H1_CONFIG_RESET_STATE 0x0036 #define AFE881H1_CONFIG_OFFSET 0x02 uint16_t AFE881H1_ReadRegister ( uint8_t address) { uint32_t frame = 0; uint32_t received_frame = 0; // Build the 24-bit frame (without CRC) frame |= (1 > 8) & 0xFFFF; /* Use this mask to extract status bits * (they are the same bits as the address in the write frame) */ // uint8_t status = (received_frame >> 24) & 0x7F; // Verify the CRC uint8_t received_CRC = received_frame & 0xFF; // Calculate CRC for received data (excluding CRC byte) uint8_t calculated_CRC = CalculateCRC8ATM(received_frame & 0xFFFFFF00); if (received_CRC != calculated_CRC) { // Error. uint8_t crcerrorflg=0; } return data_word; }
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Forum Post: RE: ADC12DL1500: ADC12DL1500EVM Design and Required FDA for S to D conversion
Got it, thank you. I will look at this today and respond back. Regards, Rob
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Forum Post: AMC60704: VDAC output voltage incorrect issue in EVM evaluation
Part Number: AMC60704 Tool/software: dears, one of my top optical module customer is evaluating AMC60704 and met issue The SPI value written by AMC60704 DAC/ADC GUI software after the voltage is given according to the specification is inconsistent with the output voltage of the test board (for example, SPI writes FFF. According to the specification, the test board should output 2.49939V voltage, but the actual output voltage is 3.3). Please help to advice the root cause and how to fix the issue. do we have the detailed tutorial on how to conduct all the evaluation tests on the EVM with the GUI besides the unboxing video? Thank you for your help!
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