Dear Alex, Really appreciate your kindness and prompt response. I thank you very much, your points are crystal clear. Just out of curiosity and I know it is possible but I want to use your expertise. What do you think about 3.3 analogue and 2.5 digital voltage supplies? Or do you recommend me of any dual output LDO rated at 1.8V and 3.0V? Kind regards!!
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Forum Post: RE: ADS1298 Writing Registers with Daisy-Chain
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Forum Post: DAC38RF83: DAC38RF83 power dissipation
Part Number: DAC38RF83 Hi I am using DAC38RF83 to generate 1 GHz signal using the internal NCO. The interface between FPGA and DAC will be at 250 MSPS. In the datasheet, the power dissipation specs are at higher values. Can I get a rough estimate, for these specifications, how much will be power dissipation,
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Forum Post: RE: ADS52J90: Register control of SYNC (via reg_74 offset 0x4A "TX_SYNC_REQ" )
Hi Paresh, I am assuming the register bits fixed the problem. I am closing the post for now. If you have any further questions, feel free to post them as a new question.
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Forum Post: PGA450Q1EVM: Resonance Tuning capacitor voltage requirement
Part Number: PGA450Q1EVM Hi Akeem, My EVM contains following components specification, IFT: 1:1:15 ratio and 4.2mH fixed coil IFT with push-pull configuration @ 4.8V VREG Transducer capacitance: 1400pF and 160Vpp @58kHz Burst pulse: 18 pulses @ every 2 sec once How much voltage need be select for tuning capacitor
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Forum Post: RE: ADS52J90EVM: Using 32-Channel Mode
Hi Kelli, I am assuming you were able to locate the scripts directory. I am closing this post. If you have any questions, feel free to post them as a new thread.
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Forum Post: RE: SRC4392: Power-down and Reset
Kato-san, The thread you've linked to doesn't seem to match up with what we are seeing. the I2C doesn't become locked up, and I"m not seeing a hardware reset taking place. Can your customer scope the I2C with a logic analyzer (as I did) and capture the register 1 read as I have done? If they are using the repeated start condition, they could instead use the Stop/Start as the second data capture shows. (this is the one that works) I can't think of a reason why that would work, but the repeated start wouldn't (especially since repeated start works for register 3) best regards, -Steve Wilson
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Forum Post: RE: DDC264EVM: Related to DDC264EVM schematic
Hi Sebin, I am closing this post. If you have any further questions, feel free to start a new thread.
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Forum Post: RE: ADS1298: Problems with aVL and aVF
Thank you for your reply, but the definitions are equivalent, right? if Lead III = Lead II - Lead I, in the definition I used, aVL = Lead I - (1/2)*Lead II = Lead I - (1/2)*(Lead III + Lead I) = (1/2)*(Lead I - Lead III), same with aVF = Lead II - (1/2)*Lead I = Lead II - (1/2)*(Lead II-Lead III) = (1/2)*(Lead II + Lead III)...
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Forum Post: RE: LDC1312: how can i increase the amount of change of LD1312
Hi Kristin, thanks for your answer, We are using LDC1000 but we want to change another LDC devices.(very expensive compared to other LDC and other reasons. ) LDC1000 output change is about 1000 unit, but LDC1612 output change very small.(20-50 unit) as I wrote above. (Same target metal) You said, you could use metal detection to LDC1312 on datasheet ( www.ti.com/.../ldc1312.pdf) Only If I can measure L, how can I use as a metal detector? Output change is very small of LDC1312 according to LDC1000 .
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Forum Post: RE: Camera Link Medium
Thank you !
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Forum Post: TLV320AIC3104: I2C
Part Number: TLV320AIC3104 Hello All, We are testing TLV320AIC3104 IC using Automatic test equipment (Advantest V93K). By making AIC3104 as slave, we could write all the registers and read back the same except Regiter-86 and Register-93. These two registers are responsible for LEFT/RIGHT_LOP/M Output Level Control Registers. In these registers, the D1(read only) bit is expected to be '0' - which means " all programmed gains are applied". But we are reading '1' . Since it's a read only bit, is any other register need to be programmed additionally. iovdd 3.3 V dvdd 1.8 V avdd 3.3 V drvdd 3.3 V Tried with both 10K and 1K pull up on SCL, SDA. Please help us. Are we missing something in programming.
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Forum Post: LMP91051: External Filter Design
Part Number: LMP91051 Hi. My customer considers using LMP91051 . They want to using LMP91051 for gas detector. They has some questions. please let me know about below questions. Q1) They want to detect CO or CO2 or CH4. Is it possible with LMP91051 ? Q2) When using external filter, Fc is center frequency of BPF? And if bandwidth is 100Hz, 50Hz ~ Fc ~ 50Hz is right? Q3) In datasheet, lamp frequency is 1~3Hz. Can we using Fc = 4Hz?
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Forum Post: RE: ADS1118: How to Calibration about single end 4ch
Hi Bob Thanks you for plenfiful notices Actaully, I want to test that How to Calibration which is Single Endded ADC on EVK board. Do you know and guide document that How to calibration on EVK board? Best regards Gerald
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Forum Post: TLV320AIC3101: TLV320AIC3101 initial setting
Part Number: TLV320AIC3101 Hi , My customer would like initial TLV320AIC3101 from MCU without OS. Do we have TLV320AIC3101 initial setting can provide for customer reference? Thanks & Regards Eddie
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Forum Post: RE: FDC1004EVM: Is the FDC1004 measuring capacitance using bridge circuits?
Thank you so much! 연구에 있어 꼭 필요한 내용이었는데 이렇게 친절히 알려주셔서 정말 감사합니다. 행복한 하루되세요!
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Forum Post: DAC5682Z: DAC5682Z Set up?
Part Number: DAC5682Z Dears. I am reviewing DAC5682Z design. Is it possible to set it to DAC5682Z ? I want to input the IQ 250MSPS to the DAC5682Z and output the center frequency 312.5Mhz. Can I do the following with the DAC5682Z Output? Thank you.
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Forum Post: RE: TLV320AIC3101: TLV320AIC3101 initial setting
Hi All, Is TLV320AIC3101 the same as TLV320ADC3101 ?? We decide to use TLV320ADC3101 for our solution. Please help us! Thank you very much Best Regards nady
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Forum Post: RE: DAC37J84: Phase noise under low temperature
Kang-san, I am working with Takumi, and I would like to update the customer's status. Out customer tried to change the output voltage of 0.9V- LDO which is supplied to VDDCLK09, VDDDAC09 and VDDT09 at Ta = -20dec C. When the LDO was lowered to 0.8 V, a tendency to decrease the noise floor was recognized, and further lowering to 0.760 V lowered the noise to the same level as at room temperature. Also, they tried raising the voltage of 0.9 V - LDO to 0.95 V, but there was no improvement in the noise floor. This 0.9V-LDO is also supplied to another DAC, and it was normal for the noise floor at any temperature. The symptoms are different even though the same power supply is supplied. Is there anything you can understand from this? Best regards, Toshi
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Forum Post: RE: SRC4392: Power-down and Reset
Hi Steve-san, Thank you very much for your support. I will request to get the the screen capture with a logic analyzer to our customer. By the way, is this issue dependent on the usage, not the device ? Best regards, Kato
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Forum Post: RE: ADS124S06: Single shot configuration for strain gauge sampling
Hi Bob, Thank you very much for the input! Monitoring the DRDY solved the problem. This is what I'm doing now (DR= 4000): 1, WAKE UP 2, START 3 wait for DRDY interrupt 4, RDATA 5, POWERDOWN Data rate is set 4000. This way I'm observing 50% more consumption than with the ads1120 (which I'm currently using, without waiting for the DRDY). The issue is that this way there are 3 main stages I see on the energy profile: START (0.4 ms), the conversation when the bridge is powered up (0.7ms) and finally getting the data ready interrupt and powering down the device (0.5ms). Do you see any possibility to make it faster or more energy friendly? It would be great to reduce the on-time of the bridge as much as possible. Thank you very much in advance for the help! All the best, Viktor
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