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Forum Post: RE: ADC3562: Regarding AINM pin processing when using AD...

Hi, Thank you for your reply. What about the question about whether it is necessary to supply the clock before the rising edge of the reset as per the timing chart on page 72?

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Forum Post: RE: DAC43508: DAC43508:

Hi Stephen, This device has not be radiation tested or qualified. Currently, you could consider the DAC121S101-SP, the DAC121S101-SEP, or the high-channel count DAC+ADC, AFE11612-SEP. All three have...

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Forum Post: RE: ADS1015-Q1: ADS1015-Q1

Some of this information can be found under the "Ordering & quality" section of the product page. Best Regards, Angel

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Forum Post: RE: DAC161S997: Inquiry on Loop and Ground Configuration in the...

Hyejun, I wasn't able to look at this question today. I might have a chance to look at this later tonight, but for now, expect an answer tomorrow. Joseph Wu

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Forum Post: ADC128S102: TCE and Young's Modulus

Part Number: ADC128S102 Tool/software: Hello, I was hoping to get TCEs and young's modulus for materials that comprise PNs below: We are performing a fatigue analysis and these inputs are high...

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Forum Post: RE: AFE58JD48EVM: Query regarding the Equalization capabilites of...

Yes you can try increasing DVDD_1P15 supply and FPGA Supply also . There is no option to increase CML swing.

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Forum Post: ADS8363: Termal pad connection for ADS8363

Part Number: ADS8363 Tool/software: Hi Sir, In the datasheet of the part ADS8363SRHBT, it is not mentioned with the connection of Thermal pad(Exposed pad). Please confirm whether thermal pad is...

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Forum Post: RE: DAC7760EVM: Problem to see driver under Windows 11 of SM-USB-DIG

Thx This helped me to know that the stick is not displayed in the driver package after connection. The problem was also that the specified software did not display an error, regardless of whether the...

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Forum Post: RE: ADC12DJ5200-SP: how to use clock chip LMX2594RHAR and...

Hi Rob, we use refer network and parallel 0.4pf capacitor to GND, parallel 50ohm resistance to GND. simulate result is not 300K to 8.2G. if we use wrong parameter?

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Forum Post: RE: ADC10D1500: Performance Plots of ADC with Balun in Q-Channel

Hi Rob, Thank you for the Information. I have a query related to placement of Balun and AC-Coupling capacitor for Sampling clock for this ADC. As per the recommendation in "Schematic Layout and...

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Forum Post: ADS7128: Example ADS7128 using ESP32

Part Number: ADS7128 Tool/software: Hi guys: I want to leave an example of use of the ADS7128 inverter applied to an ESP32. I hope this example is helpful for those who are starting out with this...

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Forum Post: ADS127L21: Match filter characteristics of ADS1271?

Part Number: ADS127L21 Other Parts Discussed in Thread: ADS1271 , Tool/software: I have an application that is currently using the ADS1271 and have a desire to move to a smaller package. The ADS127L21...

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Forum Post: RE: ADC3669EVM: ADC3669 Evaluation Module + TSWDC155EVM

Rob, I noticed that the TSWDC155EVM is not supported by a GUI. Does this mean that firmware for the FPGA will need to be developed in order to get data out? Joe

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Forum Post: RE: ADC3669EVM: ADC3669 Evaluation Module + TSWDC155EVM

Hi Joe, No that is not the case, once you have the TSW and ADC EVMs we will provide a package that has all the necessary information in order to capture data appropriately and evaluate the ADC. We are...

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Forum Post: RE: ADC3669EVM: ADC3669 Evaluation Module + TSWDC155EVM

That is great news! Just to make sure I understand you, once I've both the TSW and the ADC EVM, I will not need to develop firmware or have Xilinx development software. And I will be provided...

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Forum Post: RE: ADC3562: Regarding AINM pin processing when using AD...

Hi Oda, Yes, that is correct, please follow the timing diagram requirements. Thanks, Rob

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Forum Post: RE: ADC3669EVM: ADC3669 Evaluation Module + TSWDC155EVM

Hi Joe, yes, that is correct, we have a complete SW and FW package with user guide on how to set this up so you can move forward. Thanks for being patience. Please reach out when ready. Thanks, Rob

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Forum Post: RE: ADC10D1500: Performance Plots of ADC with Balun in Q-Channel

Hi Santanu, Just so I understand, The balun will "drive" the sampling clock inputs from 2.5inches away. Think this will be fine, what is the balun and what is the single-ended amplitude level at the...

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Forum Post: RE: ADC12DJ5200-SP: how to use clock chip LMX2594RHAR and...

Hi Xiaoqiu, Use the analog input sparameters on TI.com on the 5200RF webpage. This would be a better way to do your simulation. Regards, Rob

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Forum Post: ADC12DJ5200RFEVM: question about JMODE40

Part Number: ADC12DJ5200RFEVM Tool/software: Hello, My customer has a question about JMODE40. According to the datasheet table 6-28, JMODE40 is 12-Bit, Dual Channel, DDC Bypass and 8 Lanes. He uses...

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