Hi, I have noticed you just added an external clock to the XTAL1/CLKIN pin in your latest schematic. Your schematic looks good now, I did not see the REFIN pin of ADS131M06-Q1 in your schematic, I guess it is floating on your real circuit board. You are sending more SCLKs than the SCLKs that is needed for the ADC in one frame. ADS131M06-Q1 requires the SPI clocks for one STATUS word + 6 channel data + one word for CRC = 8 words, you are sending 9 words (each word has 24 SCLKs), so the data on DOUT in the last word (0x053F) in your timing is the right data of the STATUS register, the 3F in 0x053F indicates that the data on all input channels are ready (0x0500 is the default register data). You can start the test with internal test signals (shorted input or a DC test signal) by setting MUX[1:0] to a proper value in the CHx_CFG register. By default, internal 1.2V Vref is enabled and the gain is 1, so the code for a positive .3V SE input voltage is 1LSB = (2*1.2/Gain)/2^24 = 0.1430511uV 0.3V/0.143uV=2097152 in decimal = 0x200000 in Hexadecimal format. BR, Dale
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