Part Number: ADC3444 Other Parts Discussed in Thread: DAC34SH84 Tool/software: Hello TI team, I am working on a custom design using the ADC3444 and DAC34SH84 , both connected through an FMC card to FPGA. My goal is to implement the following data flow: Acquire data from the ADC3444 and transmit it to the Processing System (PS) side. Store the captured ADC data temporarily in ps DDR. Later, retrieve the data from storage and send it to the DAC34SH84 . Since the ADC3444 outputs 14-bit samples and the DAC34SH84 expects 16-bit input , I need to pad the 14-bit ADC data to 16-bit before sending it to the DAC . I have a few questions: How can i transmit the data from the adc to PS side ?Could you please provide system-level block diagram for this setup? What is the recommended approach for padding the 14-bit ADC data to 16-bit? Should I pad with zeros in the LSBs or MSBs to maintain signal integrity and dynamic range? Are there any available reference designs (for either ADC3444 or DAC34SH84) that illustrate a complete data flow from ADC to DAC via the PS Is there any specific initialization/configuration sequence I should follow for synchronizing both devices when routing data through PS? Attached the adc3444 and dac34sh84 datasheet link below https://www.bing.com/ck/a?!&&p=0d75b39168e99c7426bab02dd6005943df71dab0a729adc929e3835dd82f0a7aJmltdHM9MTc0NDg0ODAwMA&ptn=3&ver=2&hsh=4&fclid=12c9b4d3-bc7a-675b-2bf1-a008bde1660c&psq=adc3444+datasheet&u=a1aHR0cHM6Ly93d3cudGkuY29tL2xpdC9ncG4vQURDMzQ0NA&ntb=1 https://www.bing.com/ck/a?!&&p=53602d48f4829bb0cda10256c49c27d52c8df6ea4daa7c96e07f310c91e17aa0JmltdHM9MTc0NDg0ODAwMA&ptn=3&ver=2&hsh=4&fclid=12c9b4d3-bc7a-675b-2bf1-a008bde1660c&psq=dac34sh84+datasheet&u=a1aHR0cHM6Ly93d3cudGkuY29tL3Byb2R1Y3QvREFDMzRTSDg0&ntb=1
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