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Forum Post: RE: ADC12DJ2700: Gain trimming between ADC-A and ADC-B in Single Channel mode

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Hi Thorsten, Understood. Seems you will need to make a look up table over supply variations and temp range. This is the best method in order to "remove" any error across fullscale and frequency range used. This is a pretty common approach unless you use a licensed IP/algorithm in your FPGA to actively make these adjustments. Regards, Rob

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