Hi Zhang Liang, See the answers below: 1. This is a delta-sigma ADC that is quite different from a SAR ADC you thought. Delta-sigma is an oversampling converter that samples the input at the modulator rate. The delta-sigma converter’s primary internal cells are the modulator and the digital/decimation filter. The modulator samples the input signal at a very high rate into a 1-bit stream. The filter then takes this sampled data and converts it into a high-resolution, slower digital code. The output data rate is determined by the modulator frequency and OSR (over-sampling ratio). 2. As you can see the timing you highlighted, you have to read out the data of all the channels in the same frame/cycle. Otherwise, you will lose the data and the data will be overwritten by the new conversion data. Yes, the first word is the status data. 3. Can you let me know which register you could not write? please provide your SPI timing including SCLK, /CS, DIN, DOUT and /DRDY signals so that I can help you debug. BR, Dale
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