Hello, as I specified in my previous posts, I tried also alternate and ramp patterns, which seem to work. Ramp pattern produces numbers from 0 to 4095, however each number is repeated 4 times: I receive, for each channel, 0,0,0,0,1,1,1,1,2,2,2,2,3,3,3,3,4,4,4,4,5,5,5,5,6,6,6,6, ....and so on. The channels are not synchronized, so the ramps have random offsets. This behavior could represent a situation where a 14bit up-counter is used, but only most significant bits [14:2] are produced at output (this ADC is 12bit). I suppose this is correct. The data received from ADC during normal operation also seems good, however occasionally I receive some strange peak, which I would investigate. Furthermore, I would implement a delay calibration procedure, but I would use pseudorandom pattern having any bit changing randomly, instead of ramp pattern, with most significant bits moving very slow with respect to less significant. Calibration is less effective. Please let me know about the PRBS pattern generator. If possible, please send also a generated data sequence, so I can validate my test logic against realistic data. I'm not able to explain how the data I receive is generated. If it could help with double-check, I could send a couple of binary files with data received from ADC with ramp and PRBS patterns. Thanks Andrea
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