Hi Ueli, Can you proivde more details as to what input/output format you require here as well as frequency? I quickly glanced the ADC DS and it looks like the frequency in quesiton is somewhere between 15-125MHz? Nevertheless, I rather confirm than assume. I see talk about CDCLVPxxxx so it an LVPECL clock is required I agree with Rob and a device like CDCLVP1204 or LMK00304 are viable options. For future reference we also have a tool, Clock tree architect where you can input your clocking requirements to generate a list of potential solutions. Inputting 4-100MHz LVPECL output & a 100MHz input results in the following results: Best regards, Vicente
↧