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Forum Post: RE: Seeking advice to digitize 256+ outputs on .5mm- pitch at 40MSPS+ with 14bit+ SNR on Imager Chips.

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Hi Mike, Without reading into too much of the details, have you taken a look at the ADC34J43 ? Quad channel 14-bit in a small 7x7mm package. Very low power, so thermal design shouldn't be an issue with such high density. The JESD204B output interface is made for high density systems, requiring only two serdes lanes @ 3.2 Gbps for the entire device. The ADC3k family has high SNR and SFDR performance and includes an optional chopper circuit to move 1/f noise out of band which can then be removed through digital filtering. Note there is also a serialized LVDS version called ADC3443 in a slightly larger package. Take a look at these two ADCs as a starting point. I think they will be the best options for this application. Regards, Matt Guibord

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