Part Number: ADS127L21 Tool/software: Hey Folks! I'm curious about the START pin and synchronization functionality. Would our FPGA need to trigger a one-shot conversion and START signal every time a reading is taken? This might be annoying for our FPGA. Datasheet made us think yes, I'm curious if there's another recommended way to synchornize 2-4x of these without a START pulse needed every reading. Thanks! -Cameron
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