Hi Antesh, Your schematic looks okay for the configurations in your description. Can you provide captures of the SPI digital communication lines to verify your communication to the device is working properly and that you can read back the register configurations that you are setting? Also, how many ADC readings are you taking and how do you determine when ADC conversions are ready? Have you taken subsequent ADC readings after your first two conversion readings? The external VREF may still be settling when the first conversion is made so it would be a good idea to verify if this happens all the time or if eventually you start to see valid ADC conversions. Logic analyzer captures of when you do a data read would also be helpful. Best Regards, Angel
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